chapter 1 Architecture and Implementation of the TRIPS Processor. and Premkishore Shivakumar / chapter 2 High-Performance Data Security in an x86 Processor / chapter 3 ARM Cortex-A8: A High-Performance Processor for Low-Power Applications / chapter 4 A Rotated Array Clustered Extended Hypercube Processor: The RACE-HTM Processor. and Nikos Pitsianis / chapter 5 A High-Throughput Self-Timed FPGA Core Architecture / chapter 6 The Continuation-Based Multithreading Processor: Fuce / chapter 7 A Study of a Processor with Dual Thread Execution Modes / chapter 8 Measurement-Based Power Phase Analysis / chapter 9 Visualization by Subdivision: Two Applications for Future Graphics Platforms / chapter 10 A Performance Analysis of Two-Level Heterogeneous Processing Systems on Wavefront Algorithms / chapter 11 Microarchitectural Characteristics and Implications of Alignment of Multiple Bioinformatics Sequences / chapter 12 Towards System-Level Fault-Tolerance Using Formal Methods and SoC Methodologies / chapter 13 Forward Error Correction for On-CHip Interconnection Networks / chapter 14 Alleviating Thermal Constraints while Maintaining Performance via SIlicon-Based On-Chip Optical Interconnects