Search Results for Integrated circuits -- Verification.

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Author

Andrews, Jason R.

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Foster, Harry, 1956-

(1)

Fujita, Masahiro, 1956-

(1)

Ghosh, Indradeep, 1970-

(1)

Harris, Ian G..

(1)

(1)

Lavagno, Luciano, 1959-

(1)

(1)

Martin, Grant (Grant Edmund)

(1)

Meyer, Andreas (Andreas S.)

(1)

Perry, Douglas L.

(1)

Pradhan, Dhiraj K..

(1)

(1)

Scheffer, Louis Kossuth.

(1)

Thornton, Mitchell Aaron.

(1)

Yoeli, Michael, 1917-

(1)

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(9)

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Subject

Integrated circuits -- Verification.

(8)

Computer software -- Verification.

(2)

Formal methods (Computer science)

(2)

Asynchrones Schaltwerk.

(1)

Computerarchitektur.

(1)

Electronic books.

(1)

Electronic circuits -- Testing.

(1)

Geschwindigkeitsunabhängigkeit.

(1)

Hardwareverifikation.

(1)

Integrated circuits -- Computer simulation.

(1)

Integrated circuits -- Computer-aided design.

(1)

Integrated circuits -- Verification -- Data processing.

(1)

Integrated circuits -- Very large scale integration.

(1)

Integrierte Schaltung.

(1)

LOTOS (Computer program language)

(1)

(1)

Sequential machine theory.

(1)

Switching circuits.

(1)

Systems on a chip -- Testing.

(1)

Systems on a chip.

(1)

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1.

Cover image for Applied formal verification

Applied formal verification

Applied formal verification

Author

Perry, Douglas L. Foster, Harry, 1956-

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2.

Cover image for Digital system verification a combined formal methods and simulation framework

Digital system verification a combined formal methods and simulation framework

Digital system verification a combined formal methods and simulation framework

Author

Li, Lun, 1970- Thornton, Mitchell Aaron.

Preferred Shelf Number

ONLINE

Electronic Access

EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=440373

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3.

Cover image for Practical Design Verification

Practical Design Verification

Practical Design Verification

Author

Pradhan, Dhiraj K.. Harris, Ian G..

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Access by subscription

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4.

Cover image for Verification techniques for system-level design

Verification techniques for system-level design

Verification techniques for system-level design

Author

Fujita, Masahiro, 1956- Ghosh, Indradeep, 1970- Prasad, Mukul.

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ONLINE

Electronic Access

ScienceDirect http://www.sciencedirect.com/science/book/9780123706164

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5.

Cover image for Verification of systems and circuits using LOTOS, Petri Nets, and CCS

Verification of systems and circuits using LOTOS, Petri Nets, and CCS

Verification of systems and circuits using LOTOS, Petri Nets, and CCS

Author

Yoeli, Michael, 1917- Kol, Rakefet.

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Available by subscription from Safari Books Online
Contributor biographical information http://catdir.loc.gov/catdir/enhancements/fy0809/2007033487-b.html
John Wiley http://dx.doi.org/10.1002/9780470253410
Volltext http://proquest.tech.safaribooksonline.de/9780471704492

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6.

Cover image for EDA for IC system design, verification, and testing

EDA for IC system design, verification, and testing

EDA for IC system design, verification, and testing

Author

Scheffer, Louis Kossuth. Lavagno, Luciano, 1959- Martin, Grant (Grant Edmund)

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7.

Cover image for Co-verification of hardware and software for ARM SoC design

Co-verification of hardware and software for ARM SoC design

Co-verification of hardware and software for ARM SoC design

Author

Andrews, Jason R.

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ONLINE

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ScienceDirect http://www.sciencedirect.com/science/book/9780750677301

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8.

Cover image for Principles of functional verification

Principles of functional verification

Principles of functional verification

Author

Meyer, Andreas (Andreas S.)

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ScienceDirect http://www.sciencedirect.com/science/book/9780750676175

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9.

Cover image for Trace theory for automatic hierarchical verification of speed-independent circuits

Trace theory for automatic hierarchical verification of speed-independent circuits

Trace theory for automatic hierarchical verification of speed-independent circuits

Author

Dill, David L.

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IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6267249

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