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1. 
Cover image for Testing for small-delay defects in nanoscale CMOS integrated circuits
Testing for small-delay defects in nanoscale CMOS integrated circuits
Author 
Goel, Sandeep K, editor of compilation. Chakrabarty, Krishnendu, editor of compilation.
Preferred Shelf Number 
ONLINE(342881.1)
Electronic Access 
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2. 
Cover image for 3D IC stacking technology
3D IC stacking technology
Author 
Wu, Banqiu. Kumar, Ajay. Ramaswami, Sesh.
Preferred Shelf Number 
ONLINE
Electronic Access 
Subscription required
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3. 
Cover image for ESD failure mechanisms and models
ESD failure mechanisms and models
Author 
Voldman, Steven H. Wiley InterScience (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
John Wiley http://dx.doi.org/10.1002/9780470747254
http://site.ebrary.com/lib/alltitles/Doc?id=10317806
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4. 
Cover image for RF measurements for cellular phones and wireless data systems
RF measurements for cellular phones and wireless data systems
Author 
Scott, Allan W. Frobenius, Rex.
Preferred Shelf Number 
ONLINE
Electronic Access 
IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5361014
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5. 
Cover image for Test and Diagnosis of Analogue, Mixed-Signal and RF Integrated Circuits The system on chip approach
Test and Diagnosis of Analogue, Mixed-Signal and RF Integrated Circuits The system on chip approach
Author 
Yichuang Sun, ed.
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1049/PBCS019E
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6. 
Cover image for System-on-chip test architectures nanometer design for testability
System-on-chip test architectures nanometer design for testability
Author 
Wang, Laung-Terng. Stroud, Charles E. Touba, Nur A.
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780123739735
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7. 
Cover image for The VLSI handbook
The VLSI handbook
Author 
Chen, Wai-Kai, 1936-
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ONLINE
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8. 
Cover image for Digital integrated circuits : design-for-test using Simulink and Stateflow
Digital integrated circuits : design-for-test using Simulink and Stateflow
Author 
Perelroyzen, Evgeni.
Preferred Shelf Number 
TK7874 .P445 2007
Format: 
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9. 
Cover image for VLSI test principles and architectures design for testability
VLSI test principles and architectures design for testability
Author 
Wang, Laung-Terng. Wu, Cheng-Wen, EE Ph. D. Wen, Xiaoqing.
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780123705976
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10. 
Cover image for Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits
Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits
Author 
Bushnell, Michael L. (Michael Lee), 1950- Agrawal, Vishwani D., 1943-
Preferred Shelf Number 
TK7874.75 B87 2000
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11. 
Cover image for Integrated circuit manufacturability the art of process and design integration
Integrated circuit manufacturability the art of process and design integration
Author 
Pineda de Gyvez, José. Pradhan, Dhiraj K. IEEE Circuits and Systems Society.
Preferred Shelf Number 
ONLINE
Electronic Access 
IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5265097
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12. 
Cover image for VLSI Testing Digital and mixed analogue/digital techniques
VLSI Testing Digital and mixed analogue/digital techniques
Author 
Hurst, Stanley L.
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1049/PBCS009E
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