Title:
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Author:
Taraate, Vaibbhav. author.
ISBN:
9789811087769
Edition:
1st ed. 2019.
Physical Description:
XXI, 307 p. 263 illus., 196 illus. in color. online resource.
Added Corporate Author:
Electronic Access:
https://doi.org/10.1007/978-981-10-8776-9Copies:
Available:*
Library | Material Type | Item Barcode | Shelf Number | Status | Item Holds |
|---|---|---|---|---|---|
Searching... | E-Book | 484875-1001 | ONLINE | Searching... | Searching... |