About the Editors -- List of Contributors -- Preface -- Acknowledgments -- 1 Emerging MOSFET Technologies 1 Kalyan Biswas and Angsuman Sarkar -- 1.1 Introduction: Transistor Action -- 1.2 MOSFET Scaling -- 1.3 Challenges in Scaling the MOSFET -- 1.4 Emerging MOSFET Architectures -- 1.4.5 Graphene FET -- 1.4.6 III-V Material-based MOSFETS -- 1.4.7 HEMT -- 1.4.8 Strain Engineered MOSFETs -- 1.5 Organization of this Book -- 2 MOSFET: Device Physics and Operation 15 Ruthramurthy Balachandran, Savitesh M. Sharma, and Avtar Singh -- 2.1 Introduction to MOSFET -- 2.2 Advantages of MOSFET -- 2.3 Applications of MOSFETs -- 2.4 Types of MOSFETs -- 2.5 Band Diagram of MOSFET -- 2.6 MOSFET Regions of Operation -- 2.7 Scaling of MOSFET -- 2.8 Short-channel Effects -- 2.9 Body Bias Effect -- 2.10 Advancement of MOSFET Structures -- 3 High-K Dielectrics in Next Generation VLSI/Mixed Signal Circuits 47 Asutosh Srivastava -- 3.1 Introduction to Gate Dielectrics -- 3.2 High-K Dielectrics in Metal-Oxide-Semiconductor Capacitors -- 3.3 High-K Dielectrics in Metal Insulator Metal (MIM) Capacitors -- 3.4 MOSFETs Scaling and the Need of High-K -- 3.5 High-K Dielectrics in Next Generation Transistors -- 4 Consequential Effects of Trap Charges on Dielectric Defects for MU-G FET 61 Annada S. Lenka and Prasanna K. Sahu -- 4.1 Introduction -- 4.2 TID Effects Overview -- 4.3 Application Area of Device for TID Effect Analysis -- 4.4 Near the Earth: Trapped Radiation -- 4.5 Ionizing Radiation Effect in Silicon Dioxide (SiO2) -- 4.6 TID Effects in CMOS -- 4.7 TID Effects in Bipolar Devices -- 4.8 Understanding and Modeling a-SiO2 Physics -- 4.9 Hydrogen (H2) Reaction with Trapped Charges at Insulator -- 4.10 Pre-Existing Trap Density and their Respective Location -- 4.11 Use of High-K Dielectric in MU-G FET -- 4.12 Properties of Trap in the High-K with Interfacial Layer -- 4.13 Trap Extraction Techniques -- 4.14 Conclusion -- 5 Strain Engineering for Highly Scaled MOSFETs 85 Chinmay K. Maiti, Taraprasanna Dash, Jhansirani Jena, and Eleena Mohapatra -- 5.1 Introduction -- 5.2 Simulation Approach -- 5.3 Case Study -- 5.4 Conclusions -- 6 TCAD Analysis of Linearity Performance on Modified Ferroelectric Layer in FET Device with Spacer 113 Yash Pathak, Kajal Verma, Bansi Dhar Malhotra, and Rishu Chaujar -- 6.1 Introduction -- 6.2 Simulation and Structure of Device -- 6.3 Results and Analysis -- 6.4 Conclusion -- 7 Electrically Doped Nano Devices: A First Principle Paradigm 125 Debarati D. Roy, Pradipta Roy, and Debashis -- 7.1 Introduction -- 7.2 Electrical Doping -- 7.3 First Principle -- 7.4 Molecular Simulation -- 7.5 Conclusion -- 8 Tunnel FET: Principles and Operations 143 Zahra Ahangari -- 8.1 Introduction to Quantum Mechanics and Principles of Tunneling -- 8.2 Tunnel Field-Effect Transistor -- 8.3 Challenges of Tunnel Field-Effect Transistor -- 8.4 Techniques for Improving Electrical Performance of Tunnel Field-Effect Transistor -- 8.5 Conclusion -- 9 GaN Devices for Optoelectronics Applications 175 Nagarajan Mohankumar and Girish S. Mishra -- 9.1 Introduction -- 9.2 Properties of GaN-Based Material -- 9.3 GaN LEDs -- 9.4 GaN Lasers -- 9.5 GaN HEMTs for Optoelectronics -- 9.6 GaN Sensors -- 10 First Principles Theoretical Design on Graphene-Based Field-Effect Transistors 201 Yoshitaka Fujimoto -- 10.1 Introduction -- 10.2 Graphene -- 10.3 Graphene/h-BN Hybrid Structure -- 10.4 Conclusions -- 11 Performance Analysis of Nanosheet Transistors for Analog ICs 221 Yogendra P. Pundir, Arvind Bisht, and Pankaj K. Pal -- 11.1 Introduction -- 11.2 Evolution of Nanosheet Transistors -- 11.3 TCAD Modeling of Nanosheet Transistor -- 11.4 Transistor's Analog Performance Parameters -- 11.5 Challenges and Perspectives of Modern Analog Design -- 12 Low-Power Analog Amplifier Design using MOS Transistor in the Weak Inversion Mode 255 Soumya Pandit and Koyel Mukherjee -- 12.1 Introduction -- 12.2 Review of the Theory ofWeak Inversion Mode Operation of MOS Transistor -- 12.3 Design Steps for Transistor Sizing Using the IC -- 12.4 Design Examples -- 12.5 Summary -- 13 Ultra-conductive Junctionless Tunnel Field-effect Transistor-based Biosensor with Negative Capacitance 281 Palasri Dhar, Soumik Poddar, and Sunipa Roy -- 13.1 Introduction -- 13.2 Importance of SS and ION/IOFF in Biosensing -- 13.3 Importance of Dopingless Source and Drain in High Conductivity -- 13.4 Relation of Negative Capacitance with Non-hysteresis and Effect on Biosensing -- 13.5 Variation of Source Material on Biosensing -- 13.6 Importance of Dual Gate and Ferroelectricity on Biosensing -- 13.7 Effect of Dual Material Gate on Biosensing -- 14 Conclusion and Future Perspectives 301 Kalyan Biswas and Angsuman Sarkar -- 14.1 Applications -- 14.2 Some Recent Developments -- 14.3 Future Perspectives -- 14.4 Conclusion -- References -- Index.