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13. 
Cover image for SystemVerilog for Verification A Guide to Learning the Testbench Language Features
SystemVerilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. Tumbush, Greg. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-0715-7
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14. 
Cover image for Coupled Data Communication Techniques for High-Performance and Low-Power Computing
Coupled Data Communication Techniques for High-Performance and Low-Power Computing
Author 
Ho, Ron. editor. Drost, Robert. editor. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-6588-2
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15. 
Cover image for Technische Informatik Elektronik
Technische Informatik Elektronik
Author 
Kemnitz, Günter. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-87841-4
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16. 
Cover image for Embedded Memories for Nano-Scale VLSIs
Embedded Memories for Nano-Scale VLSIs
Author 
Zhang, Kevin. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-88497-4
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17. 
Cover image for Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Author 
Patra, Priyardarsan. author. Kougianos, Elias. author. Ranganathan, Nagarajan. author. Mohanty, Saraju P. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-76474-0
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18. 
Cover image for CMOS Active Inductors and Transformers Principle, Implementation, and Applications
CMOS Active Inductors and Transformers Principle, Implementation, and Applications
Author 
Yuan, Fei. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-76479-5
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19. 
Cover image for System Verilog for Verification A Guide to Learning the Testbench Language Features
System Verilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-76530-3
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20. 
Cover image for Computer organization, design, and architecture
Computer organization, design, and architecture
Author 
Shiva, Sajjan G., author. Shiva, Sajjan G. Computer design and architecture.
Preferred Shelf Number 
TK7885 .S525 2008
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21. 
Cover image for Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Author 
Sutherland, Stuart. author. Mills, Don. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-71715-9
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22. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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23. 
Cover image for Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005
Author 
Vachoux, A. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4020-4998-9
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24. 
Cover image for Power-Aware Computer Systems Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003 Revised Papers
Power-Aware Computer Systems Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003 Revised Papers
Author 
Falsafi, Babak. editor. VijayKumar, T. N. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b104218
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