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13.

Interconnect Noise Optimization in Nanometer Technologies

Author

Elgamel, Mohamed A. author. Bayoumi, Magdy A. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/0-387-29366-3

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14.

Scalable Hardware Verification with Symbolic Simulation

Author

Bertacco, Valeria. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/0-387-29906-8

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15.

Systemverilog for Verification A Guide to Learning the Testbench Language Features

Author

Spear, Chris. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/b138536

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16.

Leakage in Nanometer CMOS Technologies

Author

Narendra, Siva G. author. Chandrakasan, Anantha. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/0-387-28133-9

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17.

SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling

Author

Sutherland, Stuart. author. Davidmann, Simon. author. Flake, Peter. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/0-387-36495-1

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18.

Cover image for Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, China

Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, China

Author

Wang, Kesheng. editor. Kovacs, George L. editor. Wozny, Michael. editor. Fang, Minglun. editor. SpringerLink (Online service)

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ONLINE

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http://dx.doi.org/10.1007/0-387-34403-9

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19.

System-Level Design Techniques for Energy-Efficient Embedded Systems

Author

Schmitz, Marcus T. author. Al-Hashimi, Bashir M. author. Eles, Petru. author. SpringerLink (Online service)

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Electronic Access

http://dx.doi.org/10.1007/b106642

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20.

SystemC Kernel Extensions for Heterogeneous System Modeling A framework for Multi-MoC Modeling & Simulation

Author

Patel, Hiren D. author. Shukla, Sandeep K. author. SpringerLink (Online service)

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http://dx.doi.org/10.1007/b117249

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21.

Cover image for Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedings

Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedings

Author

Borrione, Dominique. editor. Paul, Wolfgang. editor. SpringerLink (Online service)

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http://dx.doi.org/10.1007/11560548

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