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61. 
Cover image for Optimized ASIP Synthesis from Architecture Description Language Models
Optimized ASIP Synthesis from Architecture Description Language Models
Author 
Schliebusch, Oliver. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4020-5686-4
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62. 
Cover image for Ultra-Low Voltage Nano-Scale Memories
Ultra-Low Voltage Nano-Scale Memories
Author 
Itoh, Kiyoo. editor. Horiguchi, Masashi. editor. Tanaka, Hitoshi. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68853-4
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63. 
Cover image for Computational Intelligence for Engineering and Manufacturing
Computational Intelligence for Engineering and Manufacturing
Author 
Andina, Diego. editor. Pham, Duc Truong. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-37452-3
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64. 
Cover image for Real-Time Applications with Stochastic Task Execution Times Analysis and Optimisation
Real-Time Applications with Stochastic Task Execution Times Analysis and Optimisation
Author 
Manolache, Sorin. author. Eles, Petru. author. Peng, Zebo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-5509-9
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65. 
Cover image for Exploring C for Microcontrollers A Hands on Approach
Exploring C for Microcontrollers A Hands on Approach
Author 
Parab, Jivan S. author. Shelake, Vinod G. author. Kamat, Rajanish K. author. Naik, Gourish M. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-6067-0
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66. 
Cover image for A Roadmap for Formal Property Verification
A Roadmap for Formal Property Verification
Author 
DasGupta, Pallab. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-4758-9
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67. 
Cover image for Fast, Efficient and Predictable Memory Accesses Optimization Algorithms for Memory Architecture Aware Compilation
Fast, Efficient and Predictable Memory Accesses Optimization Algorithms for Memory Architecture Aware Compilation
Author 
Wehmeyer, Lars. author. Marwedel, Peter. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4822-X
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68. 
Cover image for System Level Design of Reconfigurable Systems-on-Chip
System Level Design of Reconfigurable Systems-on-Chip
Author 
Voros, Nikolaos S. editor. Masselos, Konstantinos. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b136832
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69. 
Cover image for System-level Test and Validation of Hardware/Software Systems
System-level Test and Validation of Hardware/Software Systems
Author 
Sonza Reorda, Matteo. editor. Peng, Zebo. editor. Violante, Massimo. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-84628-145-8
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