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1. 
Cover image for Abstraction Refinement for Large Scale Model Checking
Abstraction Refinement for Large Scale Model Checking
Author 
Wang, Chao. author. Hachtel, Gary D. author. Somenzi, Fabio. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-34600-7
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2. 
Cover image for The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
Author 
Silva, Francisco. author. McLaurin, Teresa. author. Waayers, Tom. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-34609-0
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3. 
Cover image for Large-scale 3D data integration
Large-scale 3D data integration
Author 
Zlatanova, Siyka. Prosperi, David.
Preferred Shelf Number 
TA174 .L37 2006
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4. 
Cover image for GIS for sustainable development
GIS for sustainable development
Author 
Campagna, Michele.
Preferred Shelf Number 
HC79 .E5 G54 2006
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5. 
Cover image for EDA for IC system design, verification, and testing
EDA for IC system design, verification, and testing
Author 
Lavagno, Luciano, 1959- Martin, Grant (Grant Edmund) Scheffer, Louis Kossuth.
Preferred Shelf Number 
TK7874 .E26 2006
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6. 
Cover image for Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Author 
Leventhal, Roy G. author. Green, Lynne. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/b104647
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7. 
Cover image for Verification Methodology Manual for SystemVerilog
Verification Methodology Manual for SystemVerilog
Author 
Bergeron, Janick. author. Cerny, Eduard. author. Hunter, Alan. author. Nightingale, Andrew. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b135575
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8. 
Cover image for Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility
Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility
Author 
Ben Dhia, Sonia. editor. Ramdani, Mohamed. editor. Sicard, Etienne. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/b137864
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9. 
Cover image for Systemverilog for Verification A Guide to Learning the Testbench Language Features
Systemverilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/b138536
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10. 
Cover image for The Finite Element Method and Applications in Engineering Using Ansys®
The Finite Element Method and Applications in Engineering Using Ansys®
Author 
Madenci, Erdogan. author. Guven, Ibrahim. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-28290-9
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11. 
Cover image for Leakage in Nanometer CMOS Technologies
Leakage in Nanometer CMOS Technologies
Author 
Narendra, Siva G. author. Chandrakasan, Anantha. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-28133-9
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12. 
Cover image for Embedded System Design
Embedded System Design
Author 
Marwedel, Peter. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-30087-2
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