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13. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-43946-9
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14. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42547-9
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15. 
Cover image for Deep Reinforcement Learning Processor Design for Mobile Applications
Deep Reinforcement Learning Processor Design for Mobile Applications
Author 
Lee, Juhyoung. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36793-9
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16. 
Cover image for Data Management, Analytics and Innovation Proceedings of ICDMAI 2022
Data Management, Analytics and Innovation Proceedings of ICDMAI 2022
Author 
Goswami, Saptarsi. editor. Barara, Inderjit Singh. editor. Goje, Amol. editor. Mohan, C. editor. Bruckstein, Alfred M. editor.
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https://doi.org/10.1007/978-981-19-2600-6
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17. 
Cover image for Contemporary High Performance Computing : From Petascale toward Exascale
Contemporary High Performance Computing : From Petascale toward Exascale
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Vetter, Jeffrey S., editor.
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QA76.88 C668 2017
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18. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
Author 
Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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19. 
Cover image for Operational Amplifiers Theory and Design
Operational Amplifiers Theory and Design
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Huijsing, Johan. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-28127-8
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20. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
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Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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21. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
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Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50057-7
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22. 
Cover image for Fundamentals of Computer Architecture and Design
Fundamentals of Computer Architecture and Design
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Bindal, Ahmet. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-25811-9
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23. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
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Churiwala, Sanjay. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42438-5
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24. 
Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
Embedded Systems Design with Special Arithmetic and Number Systems
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Molahosseini, Amir Sabbagh. editor. de Sousa, Leonel Seabra. editor. (orcid)0000-0002-8066-221X Chang, Chip-Hong. editor. SpringerLink (Online service)
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