Limit Search Results
Author
Language
Publication Date
-
Subject
Material Type
Shelf Location
Library
Switch to list view
Switch to thumbnail view
Select an Action
19 Results Found Subscribe to search results
0000000DEFAULT
Print
13. 
Cover image for VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers
VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers
Author 
Hollstein, Thomas. editor. Raik, Jaan. editor. Kostin, Sergei. editor. Tšertov, Anton. editor. O'Connor, Ian. editor.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-67104-8
Format: 
Availability 
Online Library~1
Available:
Copies:
14. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
Author 
Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-41198-9
Format: 
Availability 
Online Library~1
Available:
Copies:
15. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2014
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2014
Author 
Oppenheimer, Frank. editor. Medina Pasaje, Julio Luis. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-24457-0
Format: 
Availability 
Online Library~1
Available:
Copies:
16. 
Cover image for Logic Synthesis for FPGA-Based Finite State Machines
Logic Synthesis for FPGA-Based Finite State Machines
Author 
Barkalov, Alexander. author. Titarenko, Larysa. author. Kolopienczyk, Malgorzata. author. Mielcarek, Kamil. author. Bazydlo, Grzegorz. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-24202-6
Format: 
Availability 
Online Library~1
Available:
Copies:
17. 
Cover image for VLSI-SoC: Design for Reliability, Security, and Low Power 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers
VLSI-SoC: Design for Reliability, Security, and Low Power 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers
Author 
Shin, Youngsoo. editor. Tsui, Chi Ying. editor. Kim, Jae-Joon. editor. Choi, Kiyoung. editor. Reis, Ricardo. editor. (orcid)0000-0001-5781-5858
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-46097-0
Format: 
Availability 
Online Library~1
Available:
Copies:
18. 
Cover image for New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering
New Trends in Networking, Computing, E-learning, Systems Sciences, and Engineering
Author 
Elleithy, Khaled. editor. Sobh, Tarek. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-06764-3
Format: 
Availability 
Online Library~1
Available:
Copies:
19. 
Cover image for Low-Power VLSI Circuits and Systems
Low-Power VLSI Circuits and Systems
Author 
Pal, Ajit. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-81-322-1937-8
Format: 
Availability 
Online Library~1
Available:
Copies: