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1. 
Cover image for Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Author 
Patra, Priyardarsan. author. Kougianos, Elias. author. Ranganathan, Nagarajan. author. Mohanty, Saraju P. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-76474-0
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2. 
Cover image for Power Distribution Networks with On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors
Author 
Popovich, Mikhhail. author. Mezhiba, Andrey V. author. Friedman, Eby G. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-71601-5
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3. 
Cover image for Nanometer Technology Designs High-Quality Delay Tests
Nanometer Technology Designs High-Quality Delay Tests
Author 
Tehranipoor, Mohammad. author. Ahmed, Nisar. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-75728-5
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4. 
Cover image for CMOS Current-Mode Circuits for Data Communications
CMOS Current-Mode Circuits for Data Communications
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-47691-9
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5. 
Cover image for Dynamics of Microelectromechanical Systems
Dynamics of Microelectromechanical Systems
Author 
Lobontiu, Nicolae. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68195-5
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6. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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7. 
Cover image for Design for Manufacturability and Yield for Nano-Scale CMOS
Design for Manufacturability and Yield for Nano-Scale CMOS
Author 
Chiang, Charles C. author. Kawa, Jamil. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5188-3
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8. 
Cover image for The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™
Author 
Silva, Francisco. author. McLaurin, Teresa. author. Waayers, Tom. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-34609-0
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9. 
Cover image for Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Author 
Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4826-2
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10. 
Cover image for Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
Author 
CASTRO-LÓPEZ, R. author. FERNÁNDEZ, F.V. author. GUERRA-VINUESA, O. author. RODRÍGUEZ-VÁZQUEZ, Á. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5139-5
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11. 
Cover image for Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Author 
Leventhal, Roy G. author. Green, Lynne. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b104647
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12. 
Cover image for Verification Methodology Manual for SystemVerilog
Verification Methodology Manual for SystemVerilog
Author 
Bergeron, Janick. author. Cerny, Eduard. author. Hunter, Alan. author. Nightingale, Andrew. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/b135575
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