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13. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-43946-9
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14. 
Cover image for Quick Start Guide to VHDL
Quick Start Guide to VHDL
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42543-1
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15. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42547-9
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16. 
Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
Author 
Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53768-9
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17. 
Cover image for The Dark Side of Silicon Energy Efficient Computing in the Dark Silicon Era
The Dark Side of Silicon Energy Efficient Computing in the Dark Silicon Era
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Rahmani, Amir M. editor. Liljeberg, Pasi. editor. Hemani, Ahmed. editor. Jantsch, Axel. editor. Tenhunen, Hannu. editor.
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https://doi.org/10.1007/978-3-319-31596-6
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18. 
Cover image for Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
Author 
Hu, Kai. author. Chakrabarty, Krishnendu. author. Ho, Tsung-Yi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-56255-1
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19. 
Cover image for Operational Amplifiers Theory and Design
Operational Amplifiers Theory and Design
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Huijsing, Johan. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-28127-8
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20. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
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Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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21. 
Cover image for Carbon Nanotubes for Interconnects Process, Design and Applications
Carbon Nanotubes for Interconnects Process, Design and Applications
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Todri-Sanial, Aida. editor. Dijon, Jean. editor. Maffucci, Antonio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-29746-0
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22. 
Cover image for Foundations of Hardware IP Protection
Foundations of Hardware IP Protection
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Bossuet, Lilian. editor. Torres, Lionel. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50380-6
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23. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
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Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50057-7
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24. 
Cover image for Fundamentals of Computer Architecture and Design
Fundamentals of Computer Architecture and Design
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Bindal, Ahmet. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-25811-9
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