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1. 
Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
New Data Structures and Algorithms for Logic Synthesis and Verification
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Amaru, Luca Gaetano. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-43174-1
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Cover image for Data Management on New Hardware 7th International Workshop on Accelerating Data Analysis and Data Management Systems Using Modern Processor and Storage Architectures, ADMS 2016 and 4th International Workshop on In-Memory Data Management and Analytics, IMDM 2016, New Delhi, India, September 1, 2016, Revised Selected Papers
Data Management on New Hardware 7th International Workshop on Accelerating Data Analysis and Data Management Systems Using Modern Processor and Storage Architectures, ADMS 2016 and 4th International Workshop on In-Memory Data Management and Analytics, IMDM 2016, New Delhi, India, September 1, 2016, Revised Selected Papers
Author 
Blanas, Spyros. editor. Bordawekar, Rajesh. editor. Lahiri, Tirthankar. editor. Levandoski, Justin. editor. Pavlo, Andrew. editor.
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https://doi.org/10.1007/978-3-319-56111-0
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3. 
Cover image for Computational Red Teaming Risk Analytics of Big-Data-to-Decisions Intelligent Systems
Computational Red Teaming Risk Analytics of Big-Data-to-Decisions Intelligent Systems
Author 
Abbass, Hussein A. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-08281-3
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4. 
Cover image for Embedded Systems Design for High-Speed Data Acquisition and Control
Embedded Systems Design for High-Speed Data Acquisition and Control
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Di Paolo Emilio, Maurizio. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-06865-7
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5. 
Cover image for Pragmatic enterprise architecture : strategies to transform information systems in the era of big data
Pragmatic enterprise architecture : strategies to transform information systems in the era of big data
Author 
Luisi, James V., author.
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ONLINE(355904.1)
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ScienceDirect http://www.sciencedirect.com/science/book/9780128002056
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6. 
Cover image for APPLICATION ARCHITECTURE PATTERNS FOR WEB 3.0 design patterns and use cases for modern and... secure web3 applications.
APPLICATION ARCHITECTURE PATTERNS FOR WEB 3.0 design patterns and use cases for modern and... secure web3 applications.
Author 
Tempesta, Stefano, author.
Preferred Shelf Number 
QA76.9 .A73
Electronic Access 
Taylor & Francis https://www.taylorfrancis.com/books/9781003491934
OCLC metadata license agreement http://www.oclc.org/content/dam/oclc/forms/terms/vbrl-201703.pdf
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7. 
Cover image for Cloud Native Database Principle and Practice
Cloud Native Database Principle and Practice
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Li, Feifei. author. (orcid)0009-0003-0770-5775 Zhou, Xuan. author. Cai, Peng. author. Zhang, Rong. author. Huang, Gui. author.
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https://doi.org/10.1007/978-981-97-4057-4
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8. 
Cover image for Integrated Circuit Design Tape-out Process with Open-Source Tools
Integrated Circuit Design Tape-out Process with Open-Source Tools
Author 
Ortega Cisneros, Susana. author. Baungarten Leon, Emilio Isaac. author. (orcid)0000-0001-6243-219X Mejia Alvarez, Pedro. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-92108-7
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9. 
Cover image for Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
Author 
Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470
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https://doi.org/10.1007/978-3-031-90203-1
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10. 
Cover image for Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Author 
Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470
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https://doi.org/10.1007/978-3-031-90200-0
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11. 
Cover image for Finite Element Methods Parallel-Sparse Statics and Eigen-Solutions
Finite Element Methods Parallel-Sparse Statics and Eigen-Solutions
Author 
Nguyen, Duc Thai. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-48788-0
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12. 
Cover image for High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
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Yue, Jinshan. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-97-3477-1
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