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13. 
Cover image for Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Author 
Ahmed, Jameel. author. Siyal, Mohammed Yakoob. author. Najam, Shaheryar. author. Najam, Zohaib. author. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-981-10-3120-5
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14. 
Cover image for Hardware Protection through Obfuscation
Hardware Protection through Obfuscation
Author 
Forte, Domenic. editor. Bhunia, Swarup. editor. Tehranipoor, Mark M. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-49019-9
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15. 
Cover image for Carbon Nanotubes for Interconnects Process, Design and Applications
Carbon Nanotubes for Interconnects Process, Design and Applications
Author 
Todri-Sanial, Aida. editor. Dijon, Jean. editor. Maffucci, Antonio. editor. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-29746-0
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16. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
Author 
Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-49025-0
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17. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
Author 
Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-50057-7
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18. 
Cover image for 3D Stacked Chips From Emerging Processes to Heterogeneous Systems
3D Stacked Chips From Emerging Processes to Heterogeneous Systems
Author 
Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Fettweis, Gerhard. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-20481-9
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19. 
Cover image for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Author 
Zhang, Chenxin. author. Liu, Liang. author. Öwall, Viktor. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-24004-6
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20. 
Cover image for IP Cores Design from Specifications to Production Modeling, Verification, Optimization, and Protection
IP Cores Design from Specifications to Production Modeling, Verification, Optimization, and Protection
Author 
Mohamed, Khaled Salah. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-22035-2
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21. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2013
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2013
Author 
Louërat, Marie-Minerve. editor. Maehne, Torsten. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-06317-1
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22. 
Cover image for More than Moore Technologies for Next Generation Computer Design
More than Moore Technologies for Next Generation Computer Design
Author 
Topaloglu, Rasit O. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4939-2163-8
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23. 
Cover image for Arbitrary Modeling of TSVs for 3D Integrated Circuits
Arbitrary Modeling of TSVs for 3D Integrated Circuits
Author 
Salah, Khaled. author. Ismail, Yehea. author. El-Rouby, Alaa. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07611-9
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24. 
Cover image for Multi-core cache hierarchies
Multi-core cache hierarchies
Author 
Balasubramonian, Rajeev, 1977- Jouppi, Norman P. (Norman Paul) Muralimanohar, Naveen.
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EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=440440
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