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13. 
Cover image for Quick Start Guide to Verilog
Quick Start Guide to Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-44104-2
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14. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-43946-9
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15. 
Cover image for Quick Start Guide to VHDL
Quick Start Guide to VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-42543-1
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16. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-42547-9
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17. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-53883-9
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18. 
Cover image for Artificial Intelligence and Soft Computing 16th International Conference, ICAISC 2017, Zakopane, Poland, June 11-15, 2017, Proceedings, Part II
Artificial Intelligence and Soft Computing 16th International Conference, ICAISC 2017, Zakopane, Poland, June 11-15, 2017, Proceedings, Part II
Author 
Rutkowski, Leszek. editor. (orcid)0000-0001-6960-9525 Korytkowski, Marcin. editor. Scherer, Rafał. editor. (orcid)0000-0001-9592-262X Tadeusiewicz, Ryszard. editor. Zadeh, Lotfi A. editor.
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ONLINE
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https://doi.org/10.1007/978-3-319-59060-8
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19. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-34195-8
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20. 
Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
New Data Structures and Algorithms for Logic Synthesis and Verification
Author 
Amaru, Luca Gaetano. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-43174-1
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21. 
Cover image for Hierarchical Type-2 Fuzzy Aggregation of Fuzzy Controllers
Hierarchical Type-2 Fuzzy Aggregation of Fuzzy Controllers
Author 
Cervantes, Leticia. author. Castillo, Oscar. author. (orcid)0000-0002-7385-5689 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-26671-8
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