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277. 
Cover image for The Simple Art of SoC Design Closing the Gap between RTL and ESL
The Simple Art of SoC Design Closing the Gap between RTL and ESL
Author 
Keating, Michael. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-8586-6
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278. 
Cover image for Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures The MULTICUBE Approach
Author 
Silvano, Cristina. editor. Fornaciari, William. editor. Villar, Eugenio. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8837-9
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279. 
Cover image for Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Author 
Vasileska, Dragica. editor. Goodnick, Stephen M. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4419-8840-9
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280. 
Cover image for Formal Development of a Network-Centric RTOS Software Engineering for Reliable Embedded Systems
Formal Development of a Network-Centric RTOS Software Engineering for Reliable Embedded Systems
Author 
Verhulst, Eric. author. Boute, Raymond T. author. Faria, José Miguel Sampaio. author. Sputh, Bernhard H.C. author. Mezhuyev, Vitaliy. author.
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http://dx.doi.org/10.1007/978-1-4419-9736-4
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281. 
Cover image for Programming Many-Core Chips
Programming Many-Core Chips
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Vajda, András. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9739-5
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282. 
Cover image for 3D IC stacking technology
3D IC stacking technology
Author 
Wu, Banqiu. Kumar, Ajay. Ramaswami, Sesh.
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283. 
Cover image for Mechanisms and mechanical devices sourcebook
Mechanisms and mechanical devices sourcebook
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Sclater, Neil.
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284. 
Cover image for Verilog digital system design RT level synthesis, testbench, and verification
Verilog digital system design RT level synthesis, testbench, and verification
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Navabi, Zainalabedin.
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285. 
Cover image for VHDL for logic synthesis
VHDL for logic synthesis
Author 
Rushton, Andrew.
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Books24x7 http://www.books24x7.com/marc.asp?bookid=41715
John Wiley http://dx.doi.org/10.1002/9781119995852
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286. 
Cover image for Google Sketchup workshop : modeling, visualizing, and illustrating
Google Sketchup workshop : modeling, visualizing, and illustrating
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Brixius, Laurent.
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287. 
Cover image for CAD and GIS integration
CAD and GIS integration
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Karimi, Hassan A. Akinci, Burcu.
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G70.28 C33 2010
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288. 
Cover image for Digital sculpting with Mudbox essential tools and techniques for artists
Digital sculpting with Mudbox essential tools and techniques for artists
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De la Flor, Mike. Mongeon, Bridgette.
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ScienceDirect http://www.sciencedirect.com/science/book/9780240812038
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