Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog

Supercomputing 4th Russian Supercomputing Days, RuSCDays 2018, Moscow, Russia, September 24–25, 2018, Revised Selected Papers

Software Architecture 13th European Conference, ECSA 2019, Paris, France, September 9–13, 2019, Proceedings

Machine Learning in VLSI Computer-Aided Design

Architecture of Computing Systems – ARCS 2019 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings

Reversible Computation 11th International Conference, RC 2019, Lausanne, Switzerland, June 24–25, 2019, Proceedings

Progress in Cryptology – LATINCRYPT 2017 5th International Conference on Cryptology and Information Security in Latin America, Havana, Cuba, September 20–22, 2017, Revised Selected Papers

VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers

Variant Construction from Theoretical Foundation to Applications

Introduction to Logic Circuits & Logic Design with Verilog

Quick Start Guide to Verilog

Introduction to Logic Circuits & Logic Design with VHDL