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25. 
Cover image for High Performance Computing 34th International Conference, ISC High Performance 2019, Frankfurt/Main, Germany, June 16–20, 2019, Proceedings
High Performance Computing 34th International Conference, ISC High Performance 2019, Frankfurt/Main, Germany, June 16–20, 2019, Proceedings
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Weiland, Michèle. editor. (orcid)0000-0003-4713-3073 Juckeland, Guido. editor. (orcid)0000-0002-9935-4428 Trinitis, Carsten. editor. (orcid)0000-0002-6750-3652 Sadayappan, Ponnuswamy. editor. (orcid)0000-0002-4737-2034 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-20656-7
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26. 
Cover image for Biomimetic and Biohybrid Systems 8th International Conference, Living Machines 2019, Nara, Japan, July 9–12, 2019, Proceedings
Biomimetic and Biohybrid Systems 8th International Conference, Living Machines 2019, Nara, Japan, July 9–12, 2019, Proceedings
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Martinez-Hernandez, Uriel. editor. (orcid)0000-0002-9922-7912 Vouloutsi, Vasiliki. editor. (orcid)0000-0001-6425-1026 Mura, Anna. editor. Mangan, Michael. editor. (orcid)0000-0002-0293-8874 Asada, Minoru. editor.
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27. 
Cover image for Logic Functions and Equations Binary Models for Computer Science
Logic Functions and Equations Binary Models for Computer Science
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Posthoff, Christian. author. Steinbach, Bernd. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02420-8
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28. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
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Taraate, Vaibbhav. author. SpringerLink (Online service)
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29. 
Cover image for Variant Construction from Theoretical Foundation to Applications
Variant Construction from Theoretical Foundation to Applications
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Zheng, Jeffrey. editor. SpringerLink (Online service)
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30. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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31. 
Cover image for Quick Start Guide to Verilog
Quick Start Guide to Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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32. 
Cover image for Supercomputing 4th Russian Supercomputing Days, RuSCDays 2018, Moscow, Russia, September 24–25, 2018, Revised Selected Papers
Supercomputing 4th Russian Supercomputing Days, RuSCDays 2018, Moscow, Russia, September 24–25, 2018, Revised Selected Papers
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Voevodin, Vladimir. editor. (orcid)0000-0001-6036-5106 Sobolev, Sergey. editor. (orcid)0000-0002-3474-8696 SpringerLink (Online service)
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33. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-12489-2
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34. 
Cover image for Transactions on Large-Scale Data- and Knowledge-Centered Systems XLII
Transactions on Large-Scale Data- and Knowledge-Centered Systems XLII
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Hameurlain, Abdelkader. editor. Wagner, Roland. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-662-60531-8
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35. 
Cover image for Reversible Computation 11th International Conference, RC 2019, Lausanne, Switzerland, June 24–25, 2019, Proceedings
Reversible Computation 11th International Conference, RC 2019, Lausanne, Switzerland, June 24–25, 2019, Proceedings
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Thomsen, Michael Kirkedal. editor. (orcid)0000-0003-0922-3609 Soeken, Mathias. editor. (orcid)0000-0002-0229-8766 SpringerLink (Online service)
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36. 
Cover image for Programming and Performance Visualization Tools International Workshops, ESPT 2017 and VPA 2017, Denver, CO, USA, November 12 and 17, 2017, and ESPT 2018 and VPA 2018, Dallas, TX, USA, November 16 and 11, 2018, Revised Selected Papers
Programming and Performance Visualization Tools International Workshops, ESPT 2017 and VPA 2017, Denver, CO, USA, November 12 and 17, 2017, and ESPT 2018 and VPA 2018, Dallas, TX, USA, November 16 and 11, 2018, Revised Selected Papers
Author 
Bhatele, Abhinav. editor. (orcid)0000-0003-3069-3701 Boehme, David. editor. Levine, Joshua A. editor. Malony, Allen D. editor. Schulz, Martin. editor.
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