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25. 
Cover image for Machine Learning in VLSI Computer-Aided Design
Machine Learning in VLSI Computer-Aided Design
Author 
Elfadel, Ibrahim (Abe) M. editor. Boning, Duane S. editor. Li, Xin. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-04666-8
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26. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-12489-2
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27. 
Cover image for High-Performance Modelling and Simulation for Big Data Applications Selected Results of the COST Action IC1406 cHiPSet
High-Performance Modelling and Simulation for Big Data Applications Selected Results of the COST Action IC1406 cHiPSet
Author 
Kołodziej, Joanna. editor. (orcid)0000-0002-5181-8713 González-Vélez, Horacio. editor. (orcid)0000-0003-0241-6053 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-16272-6
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28. 
Cover image for OpenSHMEM and Related Technologies. OpenSHMEM in the Era of Extreme Heterogeneity 5th Workshop, OpenSHMEM 2018, Baltimore, MD, USA, August 21–23, 2018, Revised Selected Papers
OpenSHMEM and Related Technologies. OpenSHMEM in the Era of Extreme Heterogeneity 5th Workshop, OpenSHMEM 2018, Baltimore, MD, USA, August 21–23, 2018, Revised Selected Papers
Author 
Pophale, Swaroop. editor. (orcid)0000-0001-8544-6367 Imam, Neena. editor. (orcid)0000-0001-8860-4738 Aderholdt, Ferrol. editor. (orcid)0000-0002-4208-6493 Gorentla Venkata, Manjunath. editor. (orcid)0000-0002-5282-1682 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-04918-8
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29. 
Cover image for Languages and Compilers for Parallel Computing 30th International Workshop, LCPC 2017, College Station, TX, USA, October 11–13, 2017, Revised Selected Papers
Languages and Compilers for Parallel Computing 30th International Workshop, LCPC 2017, College Station, TX, USA, October 11–13, 2017, Revised Selected Papers
Author 
Rauchwerger, Lawrence. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-35225-7
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30. 
Cover image for VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
Author 
Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651 Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669 Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850 Monteiro, José. editor. (orcid)0000-0003-0603-2268
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https://doi.org/10.1007/978-3-030-15663-3
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31. 
Cover image for Logic Functions and Equations Binary Models for Computer Science
Logic Functions and Equations Binary Models for Computer Science
Author 
Posthoff, Christian. author. Steinbach, Bernd. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02420-8
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32. 
Cover image for Analog Circuit Theory and Filter Design in the Digital World With an Introduction to the Morphological Method for Creative Solutions and Design
Analog Circuit Theory and Filter Design in the Digital World With an Introduction to the Morphological Method for Creative Solutions and Design
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Moschytz, George S. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-00096-7
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33. 
Cover image for Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
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Izadian, Afshin. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-02484-0
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34. 
Cover image for Transactions on High-Performance Embedded Architectures and Compilers V
Transactions on High-Performance Embedded Architectures and Compilers V
Author 
Silvano, Cristina. editor. (orcid)0000-0003-1668-0883 Bertels, Koen. editor. (orcid)0000-0001-9310-4885 Schulte, Michael. editor. (orcid)0000-0002-0213-4155 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-662-58834-5
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35. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Author 
Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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36. 
Cover image for Transactions on Large-Scale Data- and Knowledge-Centered Systems XLII
Transactions on Large-Scale Data- and Knowledge-Centered Systems XLII
Author 
Hameurlain, Abdelkader. editor. Wagner, Roland. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-662-60531-8
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