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25. 
Cover image for Multi-Net Optimization of VLSI Interconnect
Multi-Net Optimization of VLSI Interconnect
Author 
Moiseev, Konstantin. author. Kolodny, Avinoam. author. Wimer, Shmuel. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-1-4614-0821-5
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26. 
Cover image for FPGA Design Best Practices for Team-based Reuse
FPGA Design Best Practices for Team-based Reuse
Author 
Simpson, Philip Andrew. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-17924-7
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27. 
Cover image for SVA: The Power of Assertions in SystemVerilog
SVA: The Power of Assertions in SystemVerilog
Author 
Cerny, Eduard. author. Dudani, Surrendra. author. Havlicek, John. author. Korchemny, Dmitry. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07139-8
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28. 
Cover image for Debug Automation from Pre-Silicon to Post-Silicon
Debug Automation from Pre-Silicon to Post-Silicon
Author 
Dehbashi, Mehdi. author. Fey, Görschwin. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-09309-3
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29. 
Cover image for Formal Specification Level Concepts, Methods, and Algorithms
Formal Specification Level Concepts, Methods, and Algorithms
Author 
Soeken, Mathias. author. Drechsler, Rolf. author. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-08699-6
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30. 
Cover image for Flip-Flop Design in Nanometer CMOS From High Speed to Low Energy
Flip-Flop Design in Nanometer CMOS From High Speed to Low Energy
Author 
Alioto, Massimo. author. Consoli, Elio. author. Palumbo, Gaetano. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01997-0
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31. 
Cover image for Software and systems architecture in action
Software and systems architecture in action
Author 
Sangwan, Raghvinder S., author.
Preferred Shelf Number 
QA76.9 .A73 S29 2015
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32. 
Cover image for More than Moore Technologies for Next Generation Computer Design
More than Moore Technologies for Next Generation Computer Design
Author 
Topaloglu, Rasit O. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4939-2163-8
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33. 
Cover image for Microarchitecture of Network-on-Chip Routers A Designer's Perspective
Microarchitecture of Network-on-Chip Routers A Designer's Perspective
Author 
Dimitrakopoulos, Giorgos. author. Psarras, Anastasios. author. Seitanidis, Ioannis. author. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-1-4614-4301-8
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34. 
Cover image for Three-Dimensional Design Methodologies for Tree-based FPGA Architecture
Three-Dimensional Design Methodologies for Tree-based FPGA Architecture
Author 
Pangracious, Vinod. author. Marrakchi, Zied. author. Mehrez, Habib. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-19174-4
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35. 
Cover image for Functional Verification of Dynamically Reconfigurable FPGA-based Systems
Functional Verification of Dynamically Reconfigurable FPGA-based Systems
Author 
Gong, Lingkan. author. Diessel, Oliver. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-06838-1
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36. 
Cover image for Model-Driven Design Using IEC 61499 A Synchronous Approach for Embedded and Automation Systems
Model-Driven Design Using IEC 61499 A Synchronous Approach for Embedded and Automation Systems
Author 
Yoong, Li Hsien. author. Roop, Partha S. author. Bhatti, Zeeshan E. author. Kuo, Matthew M. Y. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-10521-5
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