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25. 
Cover image for System-Level Validation High-Level Modeling and Directed Test Generation Techniques
System-Level Validation High-Level Modeling and Directed Test Generation Techniques
Author 
Chen, Mingsong. author. Qin, Xiaoke. author. Koo, Heon-Mo. author. Mishra, Prabhat. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331265.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1359-2
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26. 
Cover image for Embedded Systems Design with FPGAs
Embedded Systems Design with FPGAs
Author 
Athanas, Peter. editor. Pnevmatikatos, Dionisios. editor. Sklavos, Nicolas. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331266.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1362-2
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27. 
Cover image for Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC)
Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC)
Author 
Gangadharan, Sridhar. author. Churiwala, Sanjay. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331327.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-3269-2
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28. 
Cover image for Self-Organization in Embedded Real-Time Systems
Self-Organization in Embedded Real-Time Systems
Author 
Higuera-Toledano, M. Teresa. editor. Brinkschulte, Uwe. editor. Rettberg, Achim. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331293.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1969-3
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29. 
Cover image for A Practical Introduction to Hardware/Software Codesign
A Practical Introduction to Hardware/Software Codesign
Author 
Schaumont, Patrick R. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331370.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-3737-6
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30. 
Cover image for Energy-aware Scheduling on Multiprocessor Platforms
Energy-aware Scheduling on Multiprocessor Platforms
Author 
Li, Dawei. author. Wu, Jie. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331714.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-5224-9
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31. 
Cover image for Designing TSVs for 3D Integrated Circuits
Designing TSVs for 3D Integrated Circuits
Author 
Khan, Nauman. author. Hassoun, Soha. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331791.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-5508-0
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32. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
Author 
Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(335669.1)
Electronic Access 
http://dx.doi.org/10.1007/978-90-481-9644-9
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