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13. 
Cover image for Machine Learning Support for Fault Diagnosis of System-on-Chip
Machine Learning Support for Fault Diagnosis of System-on-Chip
Author 
Girard, Patrick. editor. Blanton, Shawn. editor. Wang, Li-C. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-19639-3
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14. 
Cover image for System on Chip (SOC) Architecture A Practical Approach
System on Chip (SOC) Architecture A Practical Approach
Author 
Chakravarthi, Veena S. author. Koteshwar, Shivananda R. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36242-2
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15. 
Cover image for Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach
Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach
Author 
Li, Xiaowei. author. Yan, Guihai. author. Liu, Cheng. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-19-8551-5
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16. 
Cover image for Security Policy in System-on-Chip Designs Specification, Implementation and Verification
Security Policy in System-on-Chip Designs Specification, Implementation and Verification
Author 
Ray, Sandip. author. Basak, Abhishek. author. Bhunia, Swarup. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-93464-8
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17. 
Cover image for Cardiac Cell Culture Technologies Microfluidic and On-Chip Systems
Cardiac Cell Culture Technologies Microfluidic and On-Chip Systems
Author 
Brzozka, Zbigniew. editor. Jastrzebska, Elzbieta. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-70685-6
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18. 
Cover image for Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Author 
Meinerzhagen, Pascal. author. Teman, Adam. author. Giterman, Robert. author. Edri, Noa. author. Burg, Andreas. author.
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https://doi.org/10.1007/978-3-319-60402-2
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19. 
Cover image for High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
Author 
Wang, Zheng. author. Chattopadhyay, Anupam. author. (orcid)0000-0002-8818-6983 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-1073-6
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20. 
Cover image for Internally Compensated LDO Regulators for Modern System-on-Chip Design
Internally Compensated LDO Regulators for Modern System-on-Chip Design
Author 
Hinojo, José María. author. Luján Martínez, Clara. author. Torralba, Antonio. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-75411-6
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21. 
Cover image for Analysis and Design of Networks-on-Chip Under High Process Variation
Analysis and Design of Networks-on-Chip Under High Process Variation
Author 
Ezz-Eldin, Rabab. author. El-Moursy, Magdy Ali. author. Hamed, Hesham F. A. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-25766-2
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22. 
Cover image for Innovative Approaches to Cell Biomechanics From Cell Migration to On-Chip Manipulation
Innovative Approaches to Cell Biomechanics From Cell Migration to On-Chip Manipulation
Author 
Okeyo, Kennedy Omondi. author. Miyoshi, Hiromi. author. Adachi, Taiji. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-4-431-55163-8
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23. 
Cover image for Wafer-Level Chip-Scale Packaging Analog and Power Semiconductor Applications
Wafer-Level Chip-Scale Packaging Analog and Power Semiconductor Applications
Author 
Qu, Shichun. author. Liu, Yong. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4939-1556-9
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24. 
Cover image for On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits
On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits
Author 
Cui, Qiang. author. Liou, Juin J. author. Hajjar, Jean-Jacques. author. Salcedo, Javier. author. Zhou, Yuanzhong. author.
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https://doi.org/10.1007/978-3-319-10819-3
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