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1. 
Cover image for Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Author 
Shen, Ruijing. author. Tan, Sheldon X.-D. author. Yu, Hao. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-0788-1
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2. 
Cover image for Reliability, Availability and Serviceability of Networks-on-Chip
Reliability, Availability and Serviceability of Networks-on-Chip
Author 
Cota, Érika. author. Morais Amory, Alexandre. author. Soares Lubaszewski, Marcelo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0791-1
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3. 
Cover image for Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Author 
Ahuja, Sumit. author. Lakshminarayana, Avinash. author. Shukla, Sandeep Kumar. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0872-7
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4. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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5. 
Cover image for Low-Power High-Resolution Analog to Digital Converters Design, Test and Calibration
Low-Power High-Resolution Analog to Digital Converters Design, Test and Calibration
Author 
Zjajo, Amir. author. Pineda de Gyvez, José. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9725-5
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6. 
Cover image for Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Author 
Ben Jamaa, M. Haykel. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-0650-7
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7. 
Cover image for Multiprocessor System-on-Chip Hardware Design and Tool Integration
Multiprocessor System-on-Chip Hardware Design and Tool Integration
Author 
Hübner, Michael. editor. Becker, Jürgen. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6460-1
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8. 
Cover image for Focal-Plane Sensor-Processor Chips
Focal-Plane Sensor-Processor Chips
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Zarándy, Ákos. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6475-5
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9. 
Cover image for Programming Many-Core Chips
Programming Many-Core Chips
Author 
Vajda, András. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9739-5
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10. 
Cover image for Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Author 
Cardoso, João M. P. editor. Hübner, Michael. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0061-5
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11. 
Cover image for Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Reliability of Nanoscale Circuits and Systems Methodologies and Circuit Architectures
Author 
Stanisavljević, Miloš. author. Schmid, Alexandre. author. Leblebici, Yusuf. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6217-1
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12. 
Cover image for Dependability in Electronic Systems Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances
Dependability in Electronic Systems Mitigation of Hardware Failures, Soft Errors, and Electro-Magnetic Disturbances
Author 
Kanekawa, Nobuyasu. author. Ibe, Eishi H. author. Suga, Takashi. author. Uematsu, Yutaka. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6715-2
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