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37. 
Cover image for On-Chip Training NPU - Algorithm, Architecture and SoC Design
On-Chip Training NPU - Algorithm, Architecture and SoC Design
Author 
Han, Donghyeon. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-34237-0
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38. 
Cover image for Processing-in-Memory for AI From Circuits to Systems
Processing-in-Memory for AI From Circuits to Systems
Author 
Kim, Joo-Young. editor. Kim, Bongjin. editor. Kim, Tony Tae-Hyoung. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-98781-7
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39. 
Cover image for Emerging Computing: From Devices to Systems Looking Beyond Moore and Von Neumann
Emerging Computing: From Devices to Systems Looking Beyond Moore and Von Neumann
Author 
Aly, Mohamed M. Sabry. editor. Chattopadhyay, Anupam. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-16-7487-7
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40. 
Cover image for Deep Reinforcement Learning Processor Design for Mobile Applications
Deep Reinforcement Learning Processor Design for Mobile Applications
Author 
Lee, Juhyoung. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36793-9
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41. 
Cover image for Machine Learning for Indoor Localization and Navigation
Machine Learning for Indoor Localization and Navigation
Author 
Tiku, Saideep. editor. Pasricha, Sudeep. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-26712-3
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42. 
Cover image for Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
Fundamentals of Modern Electric Circuit Analysis and Filter Synthesis A Transfer Function Approach
Author 
Izadian, Afshin. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-21908-5
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43. 
Cover image for CAD for Hardware Security
CAD for Hardware Security
Author 
Farahmandi, Farimah. author. Rahman, M. Sazadur. author. Rajendran, Sree Ranjani. author. Tehranipoor, Mark. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-26896-0
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44. 
Cover image for Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
Author 
Posser, Gracieli. author. Sapatnekar, Sachin S. author. Reis, Ricardo. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-48899-8
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45. 
Cover image for Handbook of Hardware/Software Codesign
Handbook of Hardware/Software Codesign
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Ha, Soonhoi. editor. Teich, Jürgen. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-94-017-7267-9
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46. 
Cover image for Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives
Author 
Chen, Quan. author. Guo, Minyi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-6238-4
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47. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
Author 
Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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48. 
Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Author 
Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42037-0
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