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37. 
Cover image for Analysis and Design of Networks-on-Chip Under High Process Variation
Analysis and Design of Networks-on-Chip Under High Process Variation
Author 
Ezz-Eldin, Rabab. author. El-Moursy, Magdy Ali. author. Hamed, Hesham F. A. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-25766-2
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38. 
Cover image for Dynamic Memory Management for Embedded Systems
Dynamic Memory Management for Embedded Systems
Author 
Atienza Alonso, David. author. Mamagkakis, Stylianos. author. Poucet, Christophe. author. Peón-Quirós, Miguel. author. Bartzas, Alexandros. author.
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https://doi.org/10.1007/978-3-319-10572-7
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39. 
Cover image for More than Moore Technologies for Next Generation Computer Design
More than Moore Technologies for Next Generation Computer Design
Author 
Topaloglu, Rasit O. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4939-2163-8
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40. 
Cover image for Low Power Interconnect Design
Low Power Interconnect Design
Author 
Saini, Sandeep. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-1323-3
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41. 
Cover image for FPGA Design Best Practices for Team-based Reuse
FPGA Design Best Practices for Team-based Reuse
Author 
Simpson, Philip Andrew. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-17924-7
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42. 
Cover image for Arbitrary Modeling of TSVs for 3D Integrated Circuits
Arbitrary Modeling of TSVs for 3D Integrated Circuits
Author 
Salah, Khaled. author. Ismail, Yehea. author. El-Rouby, Alaa. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-07611-9
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43. 
Cover image for Emerging Memory Technologies Design, Architecture, and Applications
Emerging Memory Technologies Design, Architecture, and Applications
Author 
Xie, Yuan. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4419-9551-3
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44. 
Cover image for Correct-by-Construction Approaches for SoC Design
Correct-by-Construction Approaches for SoC Design
Author 
Sinha, Roopak. author. Roop, Parthasarathi. author. Basu, Samik. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-7864-5
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45. 
Cover image for Routing Algorithms in Networks-on-Chip
Routing Algorithms in Networks-on-Chip
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Palesi, Maurizio. editor. Daneshtalab, Masoud. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-8274-1
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46. 
Cover image for Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Author 
Mandal, Ayan. author. Khatri, Sunil P. author. Mahapatra, Rabi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-9405-8
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47. 
Cover image for Pipelined Multiprocessor System-on-Chip for Multimedia
Pipelined Multiprocessor System-on-Chip for Multimedia
Author 
Javaid, Haris. author. Parameswaran, Sri. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01113-4
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48. 
Cover image for SystemC and SystemC-AMS in Practice SystemC 2.3, 2.2 and SystemC-AMS 1.0
SystemC and SystemC-AMS in Practice SystemC 2.3, 2.2 and SystemC-AMS 1.0
Author 
Banerjee, Amal. author. Sur, Balmiki. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01147-9
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