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37. 
Cover image for Carbon Nanotubes for Interconnects Process, Design and Applications
Carbon Nanotubes for Interconnects Process, Design and Applications
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Todri-Sanial, Aida. editor. Dijon, Jean. editor. Maffucci, Antonio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-29746-0
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38. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
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Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49025-0
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39. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
Author 
Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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40. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
Author 
Churiwala, Sanjay. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42438-5
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41. 
Cover image for Model-Implementation Fidelity in Cyber Physical System Design
Model-Implementation Fidelity in Cyber Physical System Design
Author 
Molnos, Anca. editor. Fabre, Christian. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47307-9
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42. 
Cover image for Fundamentals of Electronic Systems Design
Fundamentals of Electronic Systems Design
Author 
Lienig, Jens. author. (orcid)0000-0002-2140-4587 Bruemmer, Hans. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-55840-0
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43. 
Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
Testing of Interposer-Based 2.5D Integrated Circuits
Author 
Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54714-5
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44. 
Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
New Data Structures and Algorithms for Logic Synthesis and Verification
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Amaru, Luca Gaetano. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-43174-1
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45. 
Cover image for Instruction Level Parallelism
Instruction Level Parallelism
Author 
Aiken, Alex. author. Banerjee, Utpal. author. Kejariwal, Arun. author. Nicolau, Alexandru. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4899-7797-7
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46. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
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Drechsler, Rolf. editor. Wille, Robert. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-31723-6
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47. 
Cover image for 3D Stacked Chips From Emerging Processes to Heterogeneous Systems
3D Stacked Chips From Emerging Processes to Heterogeneous Systems
Author 
Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Fettweis, Gerhard. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-20481-9
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48. 
Cover image for Smart Systems Integration and Simulation
Smart Systems Integration and Simulation
Author 
Bombieri, Nicola. editor. Poncino, Massimo. editor. Pravadelli, Graziano. editor. (orcid)0000-0002-7833-1673 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-27392-1
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