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1. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
Author 
Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-50057-7
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2. 
Cover image for Fundamentals of Computer Architecture and Design
Fundamentals of Computer Architecture and Design
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Bindal, Ahmet. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-25811-9
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Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
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Churiwala, Sanjay. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42438-5
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4. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
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Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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5. 
Cover image for Hardware Protection through Obfuscation
Hardware Protection through Obfuscation
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Forte, Domenic. editor. Bhunia, Swarup. editor. Tehranipoor, Mark M. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49019-9
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6. 
Cover image for Hardware IP Security and Trust
Hardware IP Security and Trust
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Mishra, Prabhat. editor. Bhunia, Swarup. editor. Tehranipoor, Mark. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49025-0
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7. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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8. 
Cover image for Internet of Things Building Blocks and Business Models
Internet of Things Building Blocks and Business Models
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Hussain, Fatima. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-55405-1
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9. 
Cover image for Languages and Compilers for Parallel Computing 29th International Workshop, LCPC 2016, Rochester, NY, USA, September 28-30, 2016, Revised Papers
Languages and Compilers for Parallel Computing 29th International Workshop, LCPC 2016, Rochester, NY, USA, September 28-30, 2016, Revised Papers
Author 
Ding, Chen. editor. Criswell, John. editor. Wu, Peng. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-52709-3
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10. 
Cover image for Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part II
Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part II
Author 
Squillero, Giovanni. editor. Sim, Kevin. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-55792-2
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11. 
Cover image for Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part I
Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part I
Author 
Squillero, Giovanni. editor. Sim, Kevin. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-55849-3
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12. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
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Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-41198-9
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