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37. 
Cover image for VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers
VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers
Author 
Rajaram, S. editor. Balamurugan, N.B. editor. Gracia Nirmala Rani, D. editor. Singh, Virendra. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-5950-7
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38. 
Cover image for VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers
VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers
Author 
Sengupta, Anirban. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. Sharma, Rohit. editor. Kumar Vishvakarma, Santosh. editor.
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https://doi.org/10.1007/978-981-32-9767-8
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39. 
Cover image for VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers
VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers
Author 
Bombieri, Nicola. editor. Pravadelli, Graziano. editor. Fujita, Masahiro. editor. Austin, Todd. editor. Reis, Ricardo. editor.
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https://doi.org/10.1007/978-3-030-23425-6
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40. 
Cover image for Test Generation of Crosstalk Delay Faults in VLSI Circuits
Test Generation of Crosstalk Delay Faults in VLSI Circuits
Author 
Jayanthy, S. author. Bhuvaneswari, M.C. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-2493-2
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41. 
Cover image for VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers
Author 
Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651 Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669 Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850 Monteiro, José. editor. (orcid)0000-0003-0603-2268
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https://doi.org/10.1007/978-3-030-15663-3
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42. 
Cover image for Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Author 
Meinerzhagen, Pascal. author. Teman, Adam. author. Giterman, Robert. author. Edri, Noa. author. Burg, Andreas. author.
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https://doi.org/10.1007/978-3-319-60402-2
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43. 
Cover image for VLSI Design: Circuits, Systems and Applications Select Proceedings of ICNETS2, Volume V
VLSI Design: Circuits, Systems and Applications Select Proceedings of ICNETS2, Volume V
Author 
Li, Jie. editor. Sankar, A Ravi. editor. Beulet, P Augusta Sophy. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7251-2
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44. 
Cover image for Crystal growth and evaluation of silicon for VLSI and ULSI
Crystal growth and evaluation of silicon for VLSI and ULSI
Author 
Eranna, G., author.
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ONLINE(356538.1)
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Distributed by publisher. Purchase or institutional license may be required for access.
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45. 
Cover image for VLSI-SoC: Internet of Things Foundations 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised Selected Papers
VLSI-SoC: Internet of Things Foundations 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised Selected Papers
Author 
Claesen, Luc. editor. Sanz-Pascual, Maria-Teresa. editor. Reis, Ricardo. editor. Sarmiento-Reyes, Arturo. editor. SpringerLink (Online service)
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XX(518568.1)
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https://doi.org/10.1007/978-3-319-25279-7
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46. 
Cover image for VLSI-SoC: At the Crossroads of Emerging Trends 21st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2013, Istanbul, Turkey, October 6-9, 2013, Revised Selected Papers
VLSI-SoC: At the Crossroads of Emerging Trends 21st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2013, Istanbul, Turkey, October 6-9, 2013, Revised Selected Papers
Author 
Orailoglu, Alex. editor. Ugurdag, H. Fatih. editor. Silveira, Luís Miguel. editor. Margala, Martin. editor. Reis, Ricardo. editor.
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XX(518695.1)
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https://doi.org/10.1007/978-3-319-23799-2
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47. 
Cover image for Top-down digital VLSI design from architectures to gate-level circuits and FPGAs
Top-down digital VLSI design from architectures to gate-level circuits and FPGAs
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Kaeslin, Hubert, author.
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ONLINE(355481.1)
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ScienceDirect http://www.sciencedirect.com/science/book/9780128007303
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48. 
Cover image for Trace-Based Post-Silicon Validation for VLSI Circuits
Trace-Based Post-Silicon Validation for VLSI Circuits
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Liu, Xiao. author. Xu, Qiang. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-00533-1
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