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37. 
Cover image for Advanced Techniques in Logic Synthesis, Optimizations and Applications
Advanced Techniques in Logic Synthesis, Optimizations and Applications
Author 
Gulati, Kanupriya. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7518-8
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38. 
Cover image for Cloud Connectivity and Embedded Sensory Systems
Cloud Connectivity and Embedded Sensory Systems
Author 
Spaanenburg, Lambert. author. Spaanenburg, Hendrik. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7545-4
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39. 
Cover image for Voltage Regulators for Next Generation Microprocessors
Voltage Regulators for Next Generation Microprocessors
Author 
López, Toni. author. Elferich, Reinhold. author. Alarcón, Eduard. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7560-7
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40. 
Cover image for On-Chip Instrumentation Design and Debug for Systems on Chip
On-Chip Instrumentation Design and Debug for Systems on Chip
Author 
Stollon, Neal. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7563-8
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41. 
Cover image for Energy Harvesting Systems Principles, Modeling and Applications
Energy Harvesting Systems Principles, Modeling and Applications
Author 
Kaźmierski, Tom J. editor. Beeby, Steve. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7566-9
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42. 
Cover image for Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Author 
Battezzati, Niccolò. author. Sterpone, Luca. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7595-9
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43. 
Cover image for CMOS Circuits for Passive Wireless Microsystems
CMOS Circuits for Passive Wireless Microsystems
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7680-2
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44. 
Cover image for Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Nano-Electronic Devices Semiclassical and Quantum Transport Modeling
Author 
Vasileska, Dragica. editor. Goodnick, Stephen M. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-8840-9
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45. 
Cover image for Programming Many-Core Chips
Programming Many-Core Chips
Author 
Vajda, András. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9739-5
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46. 
Cover image for Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Reconfigurable Computing From FPGAs to Hardware/Software Codesign
Author 
Cardoso, João M. P. editor. Hübner, Michael. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0061-5
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47. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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48. 
Cover image for On-Chip Interconnect with aelite Composable and Predictable Systems
On-Chip Interconnect with aelite Composable and Predictable Systems
Author 
Hansson, Andreas. author. Goossens, Kees. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6865-4
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