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37. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-43946-9
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38. 
Cover image for Quick Start Guide to VHDL
Quick Start Guide to VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42543-1
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39. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-42547-9
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40. 
Cover image for Logic Circuit Design Selected Topics and Methods
Logic Circuit Design Selected Topics and Methods
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Vingron, Shimon P. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-40673-7
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41. 
Cover image for Descriptional Complexity of Formal Systems 20th IFIP WG 1.02 International Conference, DCFS 2018, Halifax, NS, Canada, July 25–27, 2018, Proceedings
Descriptional Complexity of Formal Systems 20th IFIP WG 1.02 International Conference, DCFS 2018, Halifax, NS, Canada, July 25–27, 2018, Proceedings
Author 
Konstantinidis, Stavros. editor. Pighizzini, Giovanni. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-94631-3
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42. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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43. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-53883-9
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