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1. 
Cover image for Taking AIMS at Digital Design Analysis, Improvement, Modeling, and Synthesis
Taking AIMS at Digital Design Analysis, Improvement, Modeling, and Synthesis
Author 
Jantsch, Axel. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-35605-6
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Cover image for Explainable AI for Cybersecurity
Explainable AI for Cybersecurity
Author 
Pan, Zhixin. author. Mishra, Prabhat. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-46479-9
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3. 
Cover image for System on Chip (SOC) Architecture A Practical Approach
System on Chip (SOC) Architecture A Practical Approach
Author 
Chakravarthi, Veena S. author. Koteshwar, Shivananda R. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36242-2
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4. 
Cover image for Deep Reinforcement Learning Processor Design for Mobile Applications
Deep Reinforcement Learning Processor Design for Mobile Applications
Author 
Lee, Juhyoung. author. Yoo, Hoi-Jun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-36793-9
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5. 
Cover image for Hardware Security Training, Hands-on!
Hardware Security Training, Hands-on!
Author 
Tehranipoor, Mark. author. Anandakumar, N. Nalla. author. Farahmandi, Farimah. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-31034-8
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6. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
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Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-41198-9
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7. 
Cover image for Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment
Author 
Sklavos, Nicolas. editor. Chaves, Ricardo. editor. Di Natale, Giorgio. editor. Regazzoni, Francesco. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-44318-8
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8. 
Cover image for Logic Synthesis for FPGA-Based Finite State Machines
Logic Synthesis for FPGA-Based Finite State Machines
Author 
Barkalov, Alexander. author. Titarenko, Larysa. author. Kolopienczyk, Malgorzata. author. Mielcarek, Kamil. author. Bazydlo, Grzegorz. author.
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https://doi.org/10.1007/978-3-319-24202-6
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