Limit Search Results
Author
SpringerLink (Online service)
(55)
LaMeres, Brock J. author.
(6)
Bhunia, Swarup. editor.
(3)
Atmaca, Eren. author.
(2)
Chakrabarty, Krishnendu. author.
(2)
Language
Publication Date
-
Subject
Computer architecture.
(55)
Processor Architectures.
(55)
Electronic Circuits and Systems.
(50)
Electronic circuits.
(50)
Electronics.
(27)
Material Type
Shelf Location
Library
Switch to list view
Switch to thumbnail view
Select an Action
56 Results Found Subscribe to search results
000000000000DEFAULT
Print
37. 
Cover image for Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques
Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques
Author 
Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Lourenço, Nuno. author. Horta, Nuno. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-34060-9
Format: 
Availability 
Online Library~1
Available:
Copies:
38. 
Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Author 
Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-42037-0
Format: 
Availability 
Online Library~1
Available:
Copies:
39. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
Author 
Churiwala, Sanjay. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-42438-5
Format: 
Availability 
Online Library~1
Available:
Copies:
40. 
Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
New Data Structures and Algorithms for Logic Synthesis and Verification
Author 
Amaru, Luca Gaetano. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-43174-1
Format: 
Availability 
Online Library~1
Available:
Copies:
41. 
Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
Fundamentals of IP and SoC Security Design, Verification, and Debug
Author 
Bhunia, Swarup. editor. Ray, Sandip. editor. Sur-Kolay, Susmita. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-50057-7
Format: 
Availability 
Online Library~1
Available:
Copies:
42. 
Cover image for Fundamentals of Computer Architecture and Design
Fundamentals of Computer Architecture and Design
Author 
Bindal, Ahmet. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-25811-9
Format: 
Availability 
Online Library~1
Available:
Copies:
43. 
Cover image for RFID Security A Lightweight Paradigm
RFID Security A Lightweight Paradigm
Author 
Khattab, Ahmed. author. Jeddi, Zahra. author. Amini, Esmaeil. author. Bayoumi, Magdy. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-47545-5
Format: 
Availability 
Online Library~1
Available:
Copies:
44. 
Cover image for Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Author 
Goossens, Sven. author. Chandrasekar, Karthik. author. Akesson, Benny. author. Goossens, Kees. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-32094-6
Format: 
Availability 
Online Library~1
Available:
Copies:
45. 
Cover image for Invasive Tightly Coupled Processor Arrays
Invasive Tightly Coupled Processor Arrays
Author 
LARI, VAHID. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-981-10-1058-3
Format: 
Availability 
Online Library~1
Available:
Copies:
46. 
Cover image for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Author 
Zhang, Chenxin. author. Liu, Liang. author. Öwall, Viktor. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-24004-6
Format: 
Availability 
Online Library~1
Available:
Copies:
47. 
Cover image for Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015
Author 
Drechsler, Rolf. editor. Wille, Robert. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-31723-6
Format: 
Availability 
Online Library~1
Available:
Copies:
48. 
Cover image for SystemVerilog Assertions and Functional Coverage Guide to Language, Methodology and Applications
SystemVerilog Assertions and Functional Coverage Guide to Language, Methodology and Applications
Author 
Mehta, Ashok B. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-30539-4
Format: 
Availability 
Online Library~1
Available:
Copies:
Select an Action