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1. 
Cover image for Engineering Design A Survival Guide to Senior Capstone
Engineering Design A Survival Guide to Senior Capstone
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Mettler, Cory J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-23309-8
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Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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3. 
Cover image for Parallel Sparse Direct Solver for Integrated Circuit Simulation
Parallel Sparse Direct Solver for Integrated Circuit Simulation
Author 
Chen, Xiaoming. author. Wang, Yu. author. Yang, Huazhong. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53429-9
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4. 
Cover image for Hardware Protection through Obfuscation
Hardware Protection through Obfuscation
Author 
Forte, Domenic. editor. Bhunia, Swarup. editor. Tehranipoor, Mark M. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-49019-9
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5. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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6. 
Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Author 
Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42037-0
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7. 
Cover image for Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
Author 
Zhan, Naijun. author. Wang, Shuling. author. (orcid)0000-0002-2798-2660 Zhao, Hengjun. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47016-0
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8. 
Cover image for Designing with Xilinx® FPGAs Using Vivado
Designing with Xilinx® FPGAs Using Vivado
Author 
Churiwala, Sanjay. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-42438-5
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9. 
Cover image for Digital Systems From Logic Gates to Processors
Digital Systems From Logic Gates to Processors
Author 
Deschamps, Jean-Pierre. author. Valderrama, Elena. author. Terés, Lluís. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-41198-9
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10. 
Cover image for Model-Implementation Fidelity in Cyber Physical System Design
Model-Implementation Fidelity in Cyber Physical System Design
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Molnos, Anca. editor. Fabre, Christian. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-47307-9
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11. 
Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
Testing of Interposer-Based 2.5D Integrated Circuits
Author 
Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54714-5
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12. 
Cover image for Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
Author 
Ahmed, Jameel. author. Siyal, Mohammed Yakoob. author. Najam, Shaheryar. author. Najam, Zohaib. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-3120-5
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