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565. 
Cover image for Holonic and Multi-Agent Systems for Manufacturing Third International Conference on Industrial Applications of Holonic and Multi-Agent Systems, HoloMAS 2007, Regensburg, Germany, September 3-5, 2007
Holonic and Multi-Agent Systems for Manufacturing Third International Conference on Industrial Applications of Holonic and Multi-Agent Systems, HoloMAS 2007, Regensburg, Germany, September 3-5, 2007
Author 
Mařík, Vladimír. editor. Vyatkin, Valeriy. editor. Colombo, Armando W. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-74481-8
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566. 
Cover image for Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007 Proceedings
Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007 Proceedings
Author 
Kang, Lishan. editor. Liu, Yong. editor. Zeng, Sanyou. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-74626-3
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567. 
Cover image for Inverse Problems in Electric Circuits and Electromagnetics
Inverse Problems in Electric Circuits and Electromagnetics
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Chechurin, V. L. author. Korovkin, N. V. author. Hayakawa, M. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-46047-5
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568. 
Cover image for CMOS Current-Mode Circuits for Data Communications
CMOS Current-Mode Circuits for Data Communications
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Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-47691-9
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569. 
Cover image for Dynamics of Microelectromechanical Systems
Dynamics of Microelectromechanical Systems
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Lobontiu, Nicolae. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68195-5
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570. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
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Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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571. 
Cover image for Hardware Verification with SystemVerilog An Object-Oriented Framework
Hardware Verification with SystemVerilog An Object-Oriented Framework
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Mintz, Mike. author. Ekendahl, Robert. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-71740-1
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572. 
Cover image for System-level design with Rosetta
System-level design with Rosetta
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Alexander, Perry.
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ScienceDirect http://www.sciencedirect.com/science/book/9781558607712
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573. 
Cover image for Realistic architectural rendering with 3ds max and Mental ray
Realistic architectural rendering with 3ds max and Mental ray
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Cusson, Roger. Cardoso, Jamie.
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ScienceDirect http://www.sciencedirect.com/science/book/9780240809120
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574. 
Cover image for Routing Congestion in VLSI Circuits: Estimation and Optimization
Routing Congestion in VLSI Circuits: Estimation and Optimization
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Saxena, Prashant. author. Shelar, Rupesh S. author. Sapatnekar, Sachin S. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-48550-3
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575. 
Cover image for SAT-Based Scalable Formal Verification Solutions
SAT-Based Scalable Formal Verification Solutions
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Ganai, Malay K. author. Gupta, Aarti. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-69167-1
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576. 
Cover image for Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Author 
Sutherland, Stuart. author. Mills, Don. author. SpringerLink (Online service)
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