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49. 
Cover image for Writing Testbenches using System Verilog
Writing Testbenches using System Verilog
Author 
Bergeron, Janick. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-31275-7
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50. 
Cover image for Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Author 
Maichen, Wolfgang. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-31419-8
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51. 
Cover image for Adaptive Techniques for Mixed Signal System on Chip
Adaptive Techniques for Mixed Signal System on Chip
Author 
Fayed, Ayman. author. Ismail, Mohammed. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-32155-4
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52. 
Cover image for Computation Engineering Applied Automata Theory and Logic
Computation Engineering Applied Automata Theory and Logic
Author 
Gopalakrishnan, Ganesh. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32520-4
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53. 
Cover image for Effective Functional Verification Principles and Processes
Effective Functional Verification Principles and Processes
Author 
Vasudevan, Srivatsa. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32620-0
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54. 
Cover image for Digital Phase Lock Loops Architectures and Applications
Digital Phase Lock Loops Architectures and Applications
Author 
Al-araji, Saleh R. author. Hussain, Zahir M. author. Al-qutayri, Mahmoud A. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-32864-5
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55. 
Cover image for Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
Author 
Goloubeva, Olga. author. Rebaudengo, Maurizio. author. Reorda, Matteo Sonza. author. Violante, Massimo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-32937-4
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56. 
Cover image for VLSI-SOC: From Systems to Chips IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1–3, 2003, Darmstadt, Germany
VLSI-SOC: From Systems to Chips IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1–3, 2003, Darmstadt, Germany
Author 
Glesner, Manfred. editor. Reis, Ricardo. editor. Indrusiak, Leandro. editor. Mooney, Vincent. editor. Eveking, Hans. editor.
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http://dx.doi.org/10.1007/0-387-33403-3
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57. 
Cover image for Linear Systems
Linear Systems
Author 
Antsaklis, Panos J. author. Michel, Anthony N. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-8176-4435-0
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58. 
Cover image for Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
Author 
Yao, Libin. author. Steyaert, Michiel. author. Sansen, Willy. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4140-3
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59. 
Cover image for TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN
Author 
GRABINSKI, WLADYSLAW. editor. NAUWELAERS, BART. editor. SCHREURS, DOMINIQUE. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4556-5
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60. 
Cover image for MOBILE AD HOC NETWORKS
MOBILE AD HOC NETWORKS
Author 
TAVLI, BULENT. editor. HEINZELMAN, WENDI. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/1-4020-4633-2
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