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49. 
Cover image for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing From Algorithm to Architecture
Author 
Zhang, Chenxin. author. Liu, Liang. author. Öwall, Viktor. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-24004-6
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50. 
Cover image for Advanced Computer Architecture 11th Conference, ACA 2016, Weihai, China, August 22-23, 2016, Proceedings
Advanced Computer Architecture 11th Conference, ACA 2016, Weihai, China, August 22-23, 2016, Proceedings
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Wu, Junjie. editor. (orcid)0000-0001-5951-8988 Li, Lian. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-2209-8
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51. 
Cover image for Instruction Level Parallelism
Instruction Level Parallelism
Author 
Aiken, Alex. author. Banerjee, Utpal. author. Kejariwal, Arun. author. Nicolau, Alexandru. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4899-7797-7
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52. 
Cover image for Invasive Tightly Coupled Processor Arrays
Invasive Tightly Coupled Processor Arrays
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LARI, VAHID. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-1058-3
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53. 
Cover image for High Performance Computing ISC High Performance 2016 International Workshops, ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P^3MA, VHPC, WOPSSS, Frankfurt, Germany, June 19-23, 2016, Revised Selected Papers
High Performance Computing ISC High Performance 2016 International Workshops, ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P^3MA, VHPC, WOPSSS, Frankfurt, Germany, June 19-23, 2016, Revised Selected Papers
Author 
Taufer, Michela. editor. Mohr, Bernd. editor. Kunkel, Julian M. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-46079-6
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54. 
Cover image for FPGAs for Software Programmers
FPGAs for Software Programmers
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Koch, Dirk. editor. Hannig, Frank. editor. (orcid)0000-0003-3663-6484 Ziener, Daniel. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-26408-0
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55. 
Cover image for OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
Author 
Maruyama, Naoya. editor. de Supinski, Bronis R. editor. Wahib, Mohamed. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-45550-1
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56. 
Cover image for Counterfeit Integrated Circuits Detection and Avoidance
Counterfeit Integrated Circuits Detection and Avoidance
Author 
Tehranipoor, Mark (Mohammad). author. Guin, Ujjwal. author. Forte, Domenic. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-11824-6
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57. 
Cover image for Engineering Embedded Systems Physics, Programs, Circuits
Engineering Embedded Systems Physics, Programs, Circuits
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Hintenaus, Peter. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-10680-9
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