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49. 
Cover image for Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling
Author 
Mandal, Ayan. author. Khatri, Sunil P. author. Mahapatra, Rabi. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-9405-8
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50. 
Cover image for Trace-Based Post-Silicon Validation for VLSI Circuits
Trace-Based Post-Silicon Validation for VLSI Circuits
Author 
Liu, Xiao. author. Xu, Qiang. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-00533-1
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51. 
Cover image for Pipelined Multiprocessor System-on-Chip for Multimedia
Pipelined Multiprocessor System-on-Chip for Multimedia
Author 
Javaid, Haris. author. Parameswaran, Sri. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01113-4
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52. 
Cover image for SystemC and SystemC-AMS in Practice SystemC 2.3, 2.2 and SystemC-AMS 1.0
SystemC and SystemC-AMS in Practice SystemC 2.3, 2.2 and SystemC-AMS 1.0
Author 
Banerjee, Amal. author. Sur, Balmiki. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01147-9
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53. 
Cover image for Wireless Communication Electronics by Example
Wireless Communication Electronics by Example
Author 
Sobot, Robert. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-02871-2
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54. 
Cover image for Digital VLSI Design with Verilog A Textbook from Silicon Valley Polytechnic Institute
Digital VLSI Design with Verilog A Textbook from Silicon Valley Polytechnic Institute
Author 
Williams, John Michael. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-04789-8
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55. 
Cover image for Analogue IC Design The current-mode approach
Analogue IC Design The current-mode approach
Author 
Toumazou, C., ed. Lidgey, F. J., ed. Haigh, D. G., ed.
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http://dx.doi.org/10.1049/PBCS002E
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