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1. 
Cover image for Engineering system dynamics : a unified graph-centered approach
Engineering system dynamics : a unified graph-centered approach
Author 
Brown, Forbes T.
Preferred Shelf Number 
TA168 .B675 2007
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2. 
Cover image for Integrated Circuit Packaging, Assembly and Interconnections
Integrated Circuit Packaging, Assembly and Interconnections
Author 
Greig, William J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-33913-2
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Cover image for Metric- Driven Design Verification An Engineer's and Executive's Guide to First Pass Success
Metric- Driven Design Verification An Engineer's and Executive's Guide to First Pass Success
Author 
Carter, Hamilton B. author. Hemmady, Shankar. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-38152-7
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Cover image for Cryptographic Algorithms on Reconfigurable Hardware
Cryptographic Algorithms on Reconfigurable Hardware
Author 
Rodríguez-Henríquez, Francisco. author. Pérez, Arturo Díaz. author. Saqib, Nazar Abbas. author. Koç, Çetin Kaya. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-36682-1
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5. 
Cover image for Design and Optimization of Passive UHF RFID Systems
Design and Optimization of Passive UHF RFID Systems
Author 
Curty, Jari-Pascal. author. Declercq, Michel. author. Dehollain, Catherine. author. Joehl, Norbert. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-44710-0
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6. 
Cover image for Routing Congestion in VLSI Circuits: Estimation and Optimization
Routing Congestion in VLSI Circuits: Estimation and Optimization
Author 
Saxena, Prashant. author. Shelar, Rupesh S. author. Sapatnekar, Sachin S. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/0-387-48550-3
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7. 
Cover image for Digital Control of Electrical Drives
Digital Control of Electrical Drives
Author 
Vukosavic, Slobodan N. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-48598-0
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8. 
Cover image for Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Author 
Sachdev, Manoj. editor. Gyvez, José Pineda de. editor. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/0-387-46547-2
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9. 
Cover image for SAT-Based Scalable Formal Verification Solutions
SAT-Based Scalable Formal Verification Solutions
Author 
Ganai, Malay K. author. Gupta, Aarti. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-69167-1
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10. 
Cover image for Analog Circuit Design Techniques at 0.5 V
Analog Circuit Design Techniques at 0.5 V
Author 
Chatterjee, Shouri. author. Pun, Kong Pang. author. Stanić, Nebojša. author. Tsividis, Yannis. author. Kinget, Peter. author.
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-69954-7
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11. 
Cover image for Compiling Esterel
Compiling Esterel
Author 
Potop-Butucaru, Dumitru. author. Edwards, Stephen A. author. Berry, Gérard. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-70628-3
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12. 
Cover image for Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them
Author 
Sutherland, Stuart. author. Mills, Don. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-71715-9
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