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1. 
Cover image for Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity
Author 
Leventhal, Roy G. author. Green, Lynne. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b104647
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2. 
Cover image for Verification Methodology Manual for SystemVerilog
Verification Methodology Manual for SystemVerilog
Author 
Bergeron, Janick. author. Cerny, Eduard. author. Hunter, Alan. author. Nightingale, Andrew. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b135575
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3. 
Cover image for Systemverilog for Verification A Guide to Learning the Testbench Language Features
Systemverilog for Verification A Guide to Learning the Testbench Language Features
Author 
Spear, Chris. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/b138536
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4. 
Cover image for Writing Testbenches using System Verilog
Writing Testbenches using System Verilog
Author 
Bergeron, Janick. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-31275-7
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5. 
Cover image for Digital Phase Lock Loops Architectures and Applications
Digital Phase Lock Loops Architectures and Applications
Author 
Al-araji, Saleh R. author. Hussain, Zahir M. author. Al-qutayri, Mahmoud A. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-32864-5
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6. 
Cover image for Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
Author 
Goloubeva, Olga. author. Rebaudengo, Maurizio. author. Reorda, Matteo Sonza. author. Violante, Massimo. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-32937-4
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7. 
Cover image for Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Digital Timing Measurements From Scopes and Probes to Timing and Jitter
Author 
Maichen, Wolfgang. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-31419-8
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8. 
Cover image for Adaptive Techniques for Mixed Signal System on Chip
Adaptive Techniques for Mixed Signal System on Chip
Author 
Fayed, Ayman. author. Ismail, Mohammed. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-32155-4
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9. 
Cover image for Effective Functional Verification Principles and Processes
Effective Functional Verification Principles and Processes
Author 
Vasudevan, Srivatsa. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/0-387-32620-0
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10. 
Cover image for Sub-threshold Design for Ultra Low-Power Systems
Sub-threshold Design for Ultra Low-Power Systems
Author 
Wang, Alice. author. Calhoun, Benton H. author. Chandrakasan, Anantha P. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-0-387-34501-7
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11. 
Cover image for Abstraction Refinement for Large Scale Model Checking
Abstraction Refinement for Large Scale Model Checking
Author 
Wang, Chao. author. Hachtel, Gary D. author. Somenzi, Fabio. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/0-387-34600-7
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12. 
Cover image for A Practical Introduction to PSL
A Practical Introduction to PSL
Author 
Eisner, Cindy. author. Fisman, Dana. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-36123-9
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