Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings

Design for Manufacturability and Yield for Nano-Scale CMOS

Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog

Designing Embedded Processors A Low Power Perspective

Advanced Memory Optimization Techniques for Low-Power Embedded Processors

Real-Time Object Uniform Design Methodology with UML

Optimized ASIP Synthesis from Architecture Description Language Models

System verification proving the design solution satisfies the requirements

Ultra-Low Voltage Nano-Scale Memories

Hardware Verification with SystemVerilog An Object-Oriented Framework

Vlsi-Soc: From Systems To Silicon Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia

Systems engineering with SysML/UML modeling, analysis, design