Search Results for Logic design.

1.

Design, Analysis and Test of Logic Circuits Under Uncertainty

Author

Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)

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ONLINE(335669.1)

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http://dx.doi.org/10.1007/978-90-481-9644-9

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2.

Cover image for Tools and Algorithms for the Construction and Analysis of Systems 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II

Tools and Algorithms for the Construction and Analysis of Systems 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II

Author

Beyer, Dirk. editor. (orcid)0000-0003-4832-7662 Huisman, Marieke. editor. SpringerLink (Online service)

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ONLINE

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https://doi.org/10.1007/978-3-319-89963-3

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3.

Cover image for Software Engineering and Formal Methods SEFM 2017 Collocated Workshops: DataMod, FAACS, MSE, CoSim-CPS, and FOCLASA, Trento, Italy, September 4-5, 2017, Revised Selected Papers

Software Engineering and Formal Methods SEFM 2017 Collocated Workshops: DataMod, FAACS, MSE, CoSim-CPS, and FOCLASA, Trento, Italy, September 4-5, 2017, Revised Selected Papers

Author

Cerone, Antonio. editor. (orcid)0000-0003-2691-5279 Roveri, Marco. editor. (orcid)0000-0001-9483-3940 SpringerLink (Online service)

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ONLINE

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https://doi.org/10.1007/978-3-319-74781-1

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4.

Cover image for VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

Author

Mir, Salvador. editor. Tsui, Chi-Ying. editor. Reis, Ricardo. editor. Choy, Oliver C. S. editor. SpringerLink (Online service)

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ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-32770-4

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5.

Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings

Author

Madhusudan, P. editor. Seshia, Sanjit A. editor. SpringerLink (Online service)

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ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-31424-7

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6.

Cover image for Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings

Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings

Author

Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)

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ONLINE

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http://dx.doi.org/10.1007/978-3-642-15739-4

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7.

Cover image for Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings

Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings

Author

Das, Vinu V. editor. Thankachan, Nessy. editor. Debnath, Narayan C. editor. SpringerLink (Online service)

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ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-20499-9

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8.

Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers

Author

Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)

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ONLINE

Electronic Access

http://dx.doi.org/10.1007/978-3-642-11802-9

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9.

Cover image for Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedings

Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedings

Author

Borrione, Dominique. editor. Paul, Wolfgang. editor. SpringerLink (Online service)

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ONLINE

Electronic Access

http://dx.doi.org/10.1007/11560548

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