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1. 
Cover image for OpenMP in the Era of Low Power Devices and Accelerators 9th International Workshop on OpenMP, IWOMP 2013, Canberra, ACT, Australia, September 16-18, 2013. Proceedings
OpenMP in the Era of Low Power Devices and Accelerators 9th International Workshop on OpenMP, IWOMP 2013, Canberra, ACT, Australia, September 16-18, 2013. Proceedings
Author 
Rendell, Alistair P. editor. Chapman, Barbara M. editor. Müller, Matthias S. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(334990.1)
Electronic Access 
http://dx.doi.org/10.1007/978-3-642-40698-0
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2. 
Cover image for Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition
Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition
Author 
Ben Abdallah, Abderazek. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(336495.1)
Electronic Access 
http://dx.doi.org/10.2991/978-94-91216-92-3
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3. 
Cover image for Supercomputing 28th International Supercomputing Conference, ISC 2013, Leipzig, Germany, June 16-20, 2013. Proceedings
Supercomputing 28th International Supercomputing Conference, ISC 2013, Leipzig, Germany, June 16-20, 2013. Proceedings
Author 
Kunkel, Julian Martin. editor. Ludwig, Thomas. editor. Meuer, Hans Werner. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(334662.1)
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http://dx.doi.org/10.1007/978-3-642-38750-0
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4. 
Cover image for Embedded Systems for Smart Appliances and Energy Management
Embedded Systems for Smart Appliances and Energy Management
Author 
Grimm, Christoph. editor. Neumann, Peter. editor. Mahlknecht, Stefan. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(330846.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-8795-2
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5. 
Cover image for Design for High Performance, Low Power, and Reliable 3D Integrated Circuits
Design for High Performance, Low Power, and Reliable 3D Integrated Circuits
Author 
Lim, Sung Kyu. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(330852.1)
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http://dx.doi.org/10.1007/978-1-4419-9542-1
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6. 
Cover image for Partial Reconfiguration on FPGAs Architectures, Tools and Applications
Partial Reconfiguration on FPGAs Architectures, Tools and Applications
Author 
Koch, Dirk. author. SpringerLink (Online service)
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ONLINE(331261.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1225-0
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7. 
Cover image for System-Level Validation High-Level Modeling and Directed Test Generation Techniques
System-Level Validation High-Level Modeling and Directed Test Generation Techniques
Author 
Chen, Mingsong. author. Qin, Xiaoke. author. Koo, Heon-Mo. author. Mishra, Prabhat. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331265.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1359-2
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8. 
Cover image for Embedded Systems Design with FPGAs
Embedded Systems Design with FPGAs
Author 
Athanas, Peter. editor. Pnevmatikatos, Dionisios. editor. Sklavos, Nicolas. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331266.1)
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http://dx.doi.org/10.1007/978-1-4614-1362-2
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9. 
Cover image for High-Performance Computing Using FPGAs
High-Performance Computing Using FPGAs
Author 
Vanderbauwhede, Wim. editor. Benkrid, Khaled. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331283.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1791-0
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10. 
Cover image for Self-Organization in Embedded Real-Time Systems
Self-Organization in Embedded Real-Time Systems
Author 
Higuera-Toledano, M. Teresa. editor. Brinkschulte, Uwe. editor. Rettberg, Achim. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331293.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1969-3
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11. 
Cover image for UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
Author 
Daněk, Martin. author. Kafka, Leoš. author. Kohout, Lukáš. author. Sýkora, Jaroslav. author. Bartosinski, Roman. author.
Preferred Shelf Number 
ONLINE(331311.1)
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http://dx.doi.org/10.1007/978-1-4614-2410-9
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12. 
Cover image for Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC)
Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC)
Author 
Gangadharan, Sridhar. author. Churiwala, Sanjay. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331327.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-3269-2
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