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1. 
Cover image for Ultra-Low Voltage Nano-Scale Memories
Ultra-Low Voltage Nano-Scale Memories
Author 
Itoh, Kiyoo. editor. Horiguchi, Masashi. editor. Tanaka, Hitoshi. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68853-4
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2. 
Cover image for Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Author 
Verma, Manish. author. Marwedel, Peter. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5897-4
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3. 
Cover image for Co-design for System Acceleration A Quantitative Approach
Co-design for System Acceleration A Quantitative Approach
Author 
Nedjah, Nadia. author. Mourelle, Luiza De Macedo. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5546-1
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4. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Author 
Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-540-74442-9
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