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1. 
Cover image for Design Automation for Differential MOS Current-Mode Logic Circuits
Design Automation for Differential MOS Current-Mode Logic Circuits
Author 
Badel, Stéphane. author. Baltaci, Can. author. Cevrero, Alessandro. author. Leblebici, Yusuf. author. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-3-319-91307-0
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2. 
Cover image for Fundamentals of Switching Theory and Logic Design A Hands on Approach
Fundamentals of Switching Theory and Logic Design A Hands on Approach
Author 
Astola, Jaakko T. author. Stanković, Radomir S. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/0-387-30311-1
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3. 
Cover image for Model and Design of Bipolar and MOS Current-Mode Logic CML, ECL and SCL Digital Circuits
Model and Design of Bipolar and MOS Current-Mode Logic CML, ECL and SCL Digital Circuits
Author 
Alioto, Massimo. author. Palumbo, Gaetano. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/1-4020-2888-1
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4. 
Cover image for Principles and Structures of FPGAs
Principles and Structures of FPGAs
Author 
Amano, Hideharu. editor. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-981-13-0824-6
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5. 
Cover image for Adiabatic Logic Future Trend and System Level Perspective
Adiabatic Logic Future Trend and System Level Perspective
Author 
Teichmann, Philip. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-94-007-2345-0
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6. 
Cover image for Entwurf integrierter 3D-Systeme der Elektronik
Entwurf integrierter 3D-Systeme der Elektronik
Author 
Lienig, Jens. editor. Dietrich, Manfred. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-642-30572-6
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7. 
Cover image for VLSI Physical Design: From Graph Partitioning to Timing Closure
VLSI Physical Design: From Graph Partitioning to Timing Closure
Author 
Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-90-481-9591-6
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8. 
Cover image for Logic Synthesis for FSM-Based Control Units
Logic Synthesis for FSM-Based Control Units
Author 
Barkalov, Alexander. author. Titarenko, Larysa. author. SpringerLink (Online service)
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Electronic Access 
http://dx.doi.org/10.1007/978-3-642-04309-3
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9. 
Cover image for More than Moore Creating High Value Micro/Nanoelectronics Systems
More than Moore Creating High Value Micro/Nanoelectronics Systems
Author 
Zhang, Guo Qi. editor. Roosmalen, Alfred. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-75593-9
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10. 
Cover image for Logic Synthesis for Compositional Microprogram Control Units
Logic Synthesis for Compositional Microprogram Control Units
Author 
Barkalov, Alexander. editor. Titarenko, Larysa. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-69285-0
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11. 
Cover image for A Roadmap for Formal Property Verification
A Roadmap for Formal Property Verification
Author 
DasGupta, Pallab. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4020-4758-9
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12. 
Cover image for Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
Author 
Lienig, Jens. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/3-540-29942-4
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