Switch to list view
Switch to thumbnail view
Select an Action
6 Results Found Subscribe to search results
000000DEFAULT
Print
1. 
Cover image for Facing the Multicore-Challenge III Aspects of New Paradigms and Technologies in Parallel Computing
Facing the Multicore-Challenge III Aspects of New Paradigms and Technologies in Parallel Computing
Author 
Keller, Rainer. editor. Kramer, David. editor. Weiss, Jan-Philipp. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(334079.1)
Electronic Access 
http://dx.doi.org/10.1007/978-3-642-35893-7
Format: 
Availability 
Online Library~1
Available:
Copies:
2. 
Cover image for Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
Author 
Kaeli, David. editor. Sachs, Kai. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-93799-9
Format: 
Availability 
Online Library~1
Available:
Copies:
3. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
Author 
Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-95948-9
Format: 
Availability 
Online Library~1
Available:
Copies:
4. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Author 
Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-74442-9
Format: 
Availability 
Online Library~1
Available:
Copies:
5. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
Author 
Vounckx, Johan. editor. Azemard, Nadine. editor. Maurine, Philippe. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/11847083
Format: 
Availability 
Online Library~1
Available:
Copies:
6. 
Cover image for Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Author 
Verma, Manish. author. Marwedel, Peter. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5897-4
Format: 
Availability 
Online Library~1
Available:
Copies: