Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings

Design for Manufacturability and Yield for Nano-Scale CMOS

Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog

Real-Time Applications with Stochastic Task Execution Times Analysis and Optimisation

Processor Design System-on-Chip Computing for ASICs and FPGAs

Real-Time Object Uniform Design Methodology with UML

Exploring C for Microcontrollers A Hands on Approach

Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems Proceedings of the GM R&D Workshop, Bangalore, India, January 2007

Computational Intelligence for Engineering and Manufacturing

SAT-Based Scalable Formal Verification Solutions

Optimized ASIP Synthesis from Architecture Description Language Models

Hardware Verification with SystemVerilog An Object-Oriented Framework