Limit Search Results
Author
Subject
Material Type
Shelf Location
Library
Switch to list view
Switch to thumbnail view
Select an Action
4 Results Found Subscribe to search results
0000DEFAULT
Print
1. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
Author 
Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-3-540-74442-9
Format: 
Availability 
Online Library~1
Available:
Copies:
2. 
Cover image for Ultra-Low Voltage Nano-Scale Memories
Ultra-Low Voltage Nano-Scale Memories
Author 
Itoh, Kiyoo. editor. Horiguchi, Masashi. editor. Tanaka, Hitoshi. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-0-387-68853-4
Format: 
Availability 
Online Library~1
Available:
Copies:
3. 
Cover image for Co-design for System Acceleration A Quantitative Approach
Co-design for System Acceleration A Quantitative Approach
Author 
Nedjah, Nadia. author. Mourelle, Luiza De Macedo. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5546-1
Format: 
Availability 
Online Library~1
Available:
Copies:
4. 
Cover image for Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Author 
Verma, Manish. author. Marwedel, Peter. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-4020-5897-4
Format: 
Availability 
Online Library~1
Available:
Copies: