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1. 
Cover image for Physical Design Essentials An ASIC Design Implementation Perspective
Physical Design Essentials An ASIC Design Implementation Perspective
Author 
Golshan, Khosrow. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-46115-1
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Cover image for Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition
Author 
Sachdev, Manoj. editor. Gyvez, José Pineda de. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/0-387-46547-2
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3. 
Cover image for CMOS Current-Mode Circuits for Data Communications
CMOS Current-Mode Circuits for Data Communications
Author 
Yuan, Fei. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-47691-9
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4. 
Cover image for Dynamics of Microelectromechanical Systems
Dynamics of Microelectromechanical Systems
Author 
Lobontiu, Nicolae. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68195-5
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5. 
Cover image for Ultra-Low Voltage Nano-Scale Memories
Ultra-Low Voltage Nano-Scale Memories
Author 
Itoh, Kiyoo. editor. Horiguchi, Masashi. editor. Tanaka, Hitoshi. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68853-4
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6. 
Cover image for CMOS Biotechnology
CMOS Biotechnology
Author 
Lee, Hakho. editor. Westervelt, Robert M. editor. Ham, Donhee. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68913-5
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7. 
Cover image for Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design
Author 
Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-68953-1
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8. 
Cover image for SAT-Based Scalable Formal Verification Solutions
SAT-Based Scalable Formal Verification Solutions
Author 
Ganai, Malay K. author. Gupta, Aarti. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-69167-1
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9. 
Cover image for Analog Circuit Design Techniques at 0.5 V
Analog Circuit Design Techniques at 0.5 V
Author 
Chatterjee, Shouri. author. Pun, Kong Pang. author. Stanić, Nebojša. author. Tsividis, Yannis. author. Kinget, Peter. author.
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http://dx.doi.org/10.1007/978-0-387-69954-7
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10. 
Cover image for Compiling Esterel
Compiling Esterel
Author 
Potop-Butucaru, Dumitru. author. Edwards, Stephen A. author. Berry, Gérard. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-0-387-70628-3
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11. 
Cover image for Positive Trigonometric Polynomials and Signal Processing Applications
Positive Trigonometric Polynomials and Signal Processing Applications
Author 
Dumitrescu, Bogdan. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5125-8
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12. 
Cover image for Design for Manufacturability and Yield for Nano-Scale CMOS
Design for Manufacturability and Yield for Nano-Scale CMOS
Author 
Chiang, Charles C. author. Kawa, Jamil. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-5188-3
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