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1. 
Cover image for Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
Author 
Fornaciari, William. editor. Soudris, Dimitrios. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-91962-1
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2. 
Cover image for High Performance Multi-Channel High-Speed I/O Circuits
High Performance Multi-Channel High-Speed I/O Circuits
Author 
Oh, Taehyoun. author. Harjani, Ramesh. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-4963-8
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3. 
Cover image for High-Performance Computing on the Intel® Xeon Phi™ How to Fully Exploit MIC Architectures
High-Performance Computing on the Intel® Xeon Phi™ How to Fully Exploit MIC Architectures
Author 
Wang, Endong. author. Zhang, Qing. author. Shen, Bo. author. Zhang, Guangyong. author. Lu, Xiaowei. author.
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https://doi.org/10.1007/978-3-319-06486-4
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4. 
Cover image for Analysis of TCP Performance in Data Center Networks
Analysis of TCP Performance in Data Center Networks
Author 
Kulkarni, Santosh. author. Agrawal, Prathima. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-1-4614-7861-4
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5. 
Cover image for Flash Memories Economic Principles of Performance, Cost and Reliability Optimization
Flash Memories Economic Principles of Performance, Cost and Reliability Optimization
Author 
Richter, Detlev. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-94-007-6082-0
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